| Autor: |
Rahul Dutta, Chang Ka Fai, Surya Bhattacharya, Roshan Weerasekera, Y. Weiliang, H. Y. Li, Guruprasad Katti, Soon Wee Ho |
| Rok vydání: |
2015 |
| Předmět: |
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| Zdroj: |
2015 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC). |
| DOI: |
10.1109/edssc.2015.7285097 |
| Popis: |
For both power/ground and data carrying TSVs, TSV resistance is preferred to be as low as possible. Power/ground TSVs should exhibit larger TSV capacitance so that TSV can act as a decoupling capacitor while data TSVs should exhibit low TSV capacitance enabling larger data rates. Monolithic integration scheme employing the annular isolation ring to isolate the data and power/ground TSVs is proposed to satisfy these conflicting TSV capacitance requirements. SDevice simulations as well as PD and FD M-O-S-O-S capacitance based models are used to demonstrate that the proposed architecture achieves low TSV capacitance for data TSVs and high oxide capacitance for power/ground TSVs monolithically. Manufacturing feasibility and process integration to realize the proposed structure augmenting the TSV manufacturing flow is also discussed. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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