Writeback-Aware LLC Management for PCM-Based Main Memory Systems
Autor: | Zhichun Zhu, Gokhan Memik, Bahareh Pourshirazi, Majed Valad Beigi |
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Rok vydání: | 2019 |
Předmět: |
010302 applied physics
Hardware_MEMORYSTRUCTURES Computer science business.industry 02 engineering and technology Energy consumption 01 natural sciences Computer Graphics and Computer-Aided Design 020202 computer hardware & architecture Computer Science Applications Phase-change memory Embedded system 0103 physical sciences Scalability 0202 electrical engineering electronic engineering information engineering Cache Electrical and Electronic Engineering Latency (engineering) business Dram Auxiliary memory Efficient energy use |
Zdroj: | ACM Transactions on Design Automation of Electronic Systems. 24:1-19 |
ISSN: | 1557-7309 1084-4309 |
DOI: | 10.1145/3292009 |
Popis: | With the increase in the number of data-intensive applications on today's workloads, DRAM-based main memories are struggling to satisfy the growing data demand capacity. Phase Change Memory (PCM) is a type of non-volatile memory technology that has been explored as a promising alternative for DRAM-based main memories due to its better scalability and lower leakage energy. Despite its many advantages, PCM also has shortcomings such as long write latency, high write energy consumption, and limited write endurance, which are all related to the write operations. In this article, we propose a novel writeback-aware Last Level Cache (LLC) management scheme named WALL to reduce the number of LLC writebacks and consequently improve performance, energy efficiency, and lifetime of a PCM-based main memory system. First, we investigate the writeback behavior of LLC sets and show that writebacks are not uniformly distributed among sets; some sets observe much higher writeback rates than others. We then propose a writeback-aware set-balancing mechanism, which employs the underutilized LLC sets with few writebacks as an auxiliary storage for the evicted dirty lines from sets with frequent writebacks. We also propose a simple and effective writeback-aware replacement policy to avoid the eviction of the dirty blocks that are highly reused after being evicted from the cache. Our experimental results show that WALL achieves an average of 30.9% reduction in the total number of LLC writebacks, compared to the baseline scheme, which uses the LRU replacement policy. As a result, WALL can reduce the memory energy consumption by 23.1% and enhance PCM lifetime by 1.29×, on average, on an 8-core system with a 4GB PCM main memory, running memory-intensive applications. |
Databáze: | OpenAIRE |
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