The SP2 High-Performance Switch
| Autor: | R. F. Stucke, B. J. Nathanson, B. Aball, M. G. Atkins, Donald G. Grice, M. Tsao, Richard A. Swetz, Douglas J. Joseph, Peter H. Hochschild, Dennis G. Shea, Craig B. Stunkel, Carl A. Bender, P. R. Varker |
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| Rok vydání: | 1995 |
| Předmět: |
Engineering
Interconnection General Computer Science business.industry Network packet Adapter (computing) Chip Computer Graphics and Computer-Aided Design Theoretical Computer Science Software Computational Theory and Mathematics Shared memory Embedded system Crossbar switch Crossover switch business Information Systems Computer network |
| Zdroj: | IBM Systems Journal. 34:185-204 |
| ISSN: | 0018-8670 |
| DOI: | 10.1147/sj.342.0185 |
| Popis: | The heart of an IBM SP2™ system is the HighPerformance Switch, which is a low-latency, highbandwidth switching network that binds together RISC System/6000® processors. The switch incorporates a unique combination of topology and architectural features to scale aggregate bandwidth, enhance reliability, and simplify cabling. It is a bidirectional multistage interconnect subsystem driven by a common oscillator, and delivers both data and service packets over the same links. Switching elements contain a dynamically allocated shared buffer for storing blocked packet flits. The switch is constructed primarily from switching elements (the Vulcan switch chip) and adapters (the SP2 communication adapter). The SP2 communication adapter uses a variety of techniques to improve bandwidth and offload communication tasks from the node processor. This paper examines the switch architecture and presents an overview of its support software. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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