| Autor: |
Douglas Van Den Broeke, Robert John Socha, J. Fung Chen, Stephen Hsu, John S. Petersen, Will Conley, Donis G. Flagello, Linda Yu, Judith van Praagh, Wei Wu, Richard Droste, David J. Gerold |
| Rok vydání: |
2002 |
| Předmět: |
|
| Zdroj: |
SPIE Proceedings. |
| ISSN: |
0277-786X |
| DOI: |
10.1117/12.474594 |
| Popis: |
In this paper the concept of chromeless phase lithography (CPL) is introduced and experimental results on an ASML PAS 5500/800 are presented. CPL is a single exposure technique and is capable of resolution enhancement on all device layers (bright and dark field masks). Line space structures through pitch are measured with cross section and have O.35jim depth of focus (DOF) at 10% exposure latitude without forbidden pitches. CPL experimental results for a k1 of 0.38 (½ pitch) are presented for three DRAM device layers, isolation brick wall, storage capacitor, and honeycomb contact. Each of these layers have a DOF of O.35jim at 10% exposure latitude. CPL experimental results are presented for a SRAM gate and contact with lOOnm feature size (k1=O.32) and have a DOF of O.35jim at 10% exposure latitude. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
|
