Bit Distribution and Reliability of High Density 1.5 V Ferroelectric Random Access Memory Embedded with 130 nm, 5 lm Copper Complementary Metal Oxide Semiconductor Logic

Autor:	S. R. Summerfelt, Theodore S. Moise, K. R. Udayakumar, Sanjeev Aggarwal, Hugh P. McAdams, B. Rathsack, Francis G. Celii, J. Rodriguez, Lindsey H. Hall, L. Matz, J. S. Martin, K. Remack, K. Boku
Rok vydání:	2006
Předmět:	Materials science Physics and Astronomy (miscellaneous) business.industry General Engineering General Physics and Astronomy Ranging Fluorosilicate glass Ferroelectricity Signal law.invention Capacitor Reliability (semiconductor) CMOS law Optoelectronics Node (circuits) business
Zdroj:	Japanese Journal of Applied Physics. 45:3202-3206
ISSN:	1347-4065 0021-4922
DOI:	10.1143/jjap.45.3202
Popis:	High density embedded ferroelectric random access memory (FRAM), operable at 1.5 V, has been fabricated within a 130 nm, 5 lm Cu/fluorosilicate glass (FSG) logic process. To evaluate FRAM extendability to future process nodes, we have measured the bit distribution and reliability properties of arrays with varying individual capacitor areas ranging from 0.40 µm2 (130 nm node) to 0.15 µm2 (~65 nm node). Wide signal margins, stable retention (10 years at 85 °C), and high endurance read/write cycling (1012 cycles) have been demonstrated, suggesting that reliable, high density FRAM can be realized.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::2e7d2c32233b3f3010b8890f4f15bdf3 https://doi.org/10.1143/jjap.45.3202 Zobrazit plný text záznamu