Symmetric Power Analysis Attack Resilient Adiabatic Logic for Smartcard Applications
| Autor: | Himadri Singh Raghav, Izzet Kale, Viv A. Bartlett |
|---|---|
| Rok vydání: | 2018 |
| Předmět: |
Physics
020208 electrical & electronic engineering 020206 networking & telecommunications Ranging 02 engineering and technology Topology Charge sharing Power analysis 0202 electrical engineering electronic engineering information engineering Waveform Multiplier (economics) Adiabatic process Scaling Energy (signal processing) Hardware_LOGICDESIGN |
| Zdroj: | PATMOS |
| Popis: | On the whole existing secure adiabatic logic designs exhibit variations in current peaks and have asymmetric structures. However, asymmetric structure and variations in current peaks make the circuit vulnerable to Power Analysis Attacks (PAA). In this paper, we shall present a novel PAA resilient adiabatic logic which has a symmetric structure and exhibits the least variations in current peaks for basic gates as well as in 8-bit Montgomery multiplier. The proposed logic has been compared with two recently proposed secure adiabatic logic designs for operating frequencies ranging from 1MHz to 100MHz and power-supply scaling ranging from 0.6V to 1.8V. Simulation results of the gates show that our proposed logic exhibits the lowest Normalized Energy Deviation (NED) and Normalized Standard Deviation (NSD) under the said frequency variations. All the 2-input gates that deploy the proposed logic dissipate nearly the same average energy within 0.2% of each other at all the frequencies simulated and thus, along with the data-independence, gate-function-independence is achieved. The paper will also report on the energy dissipated by the proposed logic which approaches that of the existing logic designs as the output load capacitance is increased above 100fF. The simulation results of the 8-bit adiabatic Montgomery multiplier show that the proposed logic exhibits the least value of NED and NSD under the said frequency variations and power-supply scaling. Finally, the paper will report on the current waveform graphs for variations in current peaks under power-clock scaling. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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