Degradation Characteristics of n- and p-Channel Polycrystalline-Silicon TFTs Under CMOS Inverter Operation
| Autor: | Mutsuko Hatano, Yoshiaki Toyota, Makoto Ohkura, Mieko Matsumura, Takeo Shiba |
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| Rok vydání: | 2010 |
| Předmět: |
Materials science
business.industry Transistor Electrical engineering High voltage engineering.material Electronic Optical and Magnetic Materials law.invention Threshold voltage Polycrystalline silicon CMOS law Thin-film transistor Logic gate engineering Optoelectronics Inverter Electrical and Electronic Engineering business |
| Zdroj: | IEEE Transactions on Electron Devices. 57:429-436 |
| ISSN: | 1557-9646 0018-9383 |
| DOI: | 10.1109/ted.2009.2036808 |
| Popis: | The degradation characteristics of n- and p-channel polysilicon thin-film transistors (TFTs) under circuit operation were investigated by using CMOS inverter circuits consisting of n-channel TFTs with a lightly doped drain (LDD) structure and p-channel TFTs with a single-drain (SD) structure. A new test element made it possible to separately evaluate the degradation characteristics of each type of TFT during CMOS inverter operation. In regard to n-channel LDD TFTs, the device degradation is mainly caused by accumulated dc stress under the condition that the gate voltage is near the threshold voltage and the high drain voltage, i.e., the drain-avalanche hot-carrier (DAHC) stress condition. In p-channel SD TFTs, the device degradation is caused by the mutual interaction between DAHC stress and negative-bias-temperature (NBT) stress. Hole injection due to NBT stress is accelerated by DAHC-stress-induced trapped electrons under inverter-circuit operation. The effect is thus enhanced not only by the increase in the number of hole injections but also by the increase in the number of electron injections. It was found that the device characteristics of p-channel TFTs are more rapidly degraded as the rising time of the input pulse becomes shorter. This degradation is caused by the transient increase in the number of hot electrons, which are generated when holes are emitted from the trap states when the p-channel TFTs are turned off. |
| Databáze: | OpenAIRE |
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