FL-RuNS: A High-Performance and Runtime Reconfigurable Fault-Tolerant Routing Scheme for Partially Connected Three-Dimensional Networks on Chip
| Autor: | Nacer-Eddine Zergainoh, Raoul Velazco, Alexandre Siqueira Guedes Coelho, Amir Charif |
|---|---|
| Rok vydání: | 2019 |
| Předmět: |
Computer science
Network packet Reliability (computer networking) Distributed computing Fault tolerance Hardware_PERFORMANCEANDRELIABILITY 02 engineering and technology Deadlock 021001 nanoscience & nanotechnology Computer Science Applications Packet loss Scalability Overhead (computing) Electrical and Electronic Engineering Routing (electronic design automation) 0210 nano-technology |
| Zdroj: | IEEE Transactions on Nanotechnology. 18:806-818 |
| ISSN: | 1941-0085 1536-125X |
| DOI: | 10.1109/tnano.2019.2931271 |
| Popis: | Three-dimensional networks on chip (3D-NoCs) have been proposed as an enormously scalable solution to address communication problems in modern systems on chip. Through-silicon via (TSV) is usually adopted as a viable technology enabling vertical connection among NoC layers. However, TSV-based architectures typically exhibit high vulnerability to transient and permanent faults caused by aging effects, thermal violations, manufacturing issues, or even transient fault sources. Therefore, TSV-based architectures call for robust routing schemes capable of sustaining operation under unpredictable failure patterns. In this paper, we introduce FL-RuNS, a fault-tolerant routing scheme for achieving 100% packet delivery under an unconstrained set of runtime and permanent vertical link failures. The proposed scheme uses the concept of vertical link announcement to inform nodes in the network of the health condition of vertical links. This mechanism is able to dynamically and progressively reconfigure the entire network without any packet loss. FL-RuNS requires a very low number of asymmetric virtual channels to achieve both deadlock freedom and reachability. Also, FL-RuNS introduces one-flit-dedicated virtual channels, which are used as an escape buffer in case of TSVs failures. The experimental results have confirmed that FL-RuNS shows better reliability when compared to the recently proposed fault-tolerant routing algorithm. Furthermore, the hardware synthesis performed using a commercial 28-nm technology library shows a reasonable area and power overhead with respect to the non-fault-tolerant baseline. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
|