Fast modulo 2n+1 multi-operand adders and residue generators
Autor: | D. Bakalis, Haridimos T. Vergos, Constantinos Efstathiou |
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Rok vydání: | 2010 |
Předmět: | |
Zdroj: | Integration. 43:42-48 |
ISSN: | 0167-9260 |
DOI: | 10.1016/j.vlsi.2009.04.002 |
Popis: | In this manuscript novel architectures for modulo 2^n+1 multi-operand addition and residue generation are introduced. The proposed arithmetic components consist of a translation stage, an inverted end-around-carry carry-save-adder tree and an enhanced diminished-1 modulo 2^n+1 adder. Qualitative and quantitative results indicate that the proposed architectures result in significantly faster and in several cases smaller circuits than the previously proposed. |
Databáze: | OpenAIRE |
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