Bias-Dependent Variation in FinFET SRAM
| Autor: | Xi Cao, Jack M. Higman, Rick Carter, O Sung Kwon, Joseph Versaggi, M. A. Karim, Randy W. Mann, Sanjay Parihar, Meixiong Zhao |
|---|---|
| Rok vydání: | 2020 |
| Předmět: |
Random access memory
Fin field effect transistor Materials science business.industry Hardware_PERFORMANCEANDRELIABILITY Variation (linguistics) Hardware and Architecture Logic gate MOSFET Hardware_INTEGRATEDCIRCUITS Optoelectronics Voltage range Node (circuits) Static random-access memory Electrical and Electronic Engineering business Software |
| Zdroj: | IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 28:1341-1344 |
| ISSN: | 1557-9999 1063-8210 |
| DOI: | 10.1109/tvlsi.2020.2974202 |
| Popis: | In this brief, we investigate device variability in advanced fin field effect transistor (FinFET) static random access memory (SRAM) devices (12 and 7 nm) as a function of drain-to-source (Vds) bias. Drain-induced barrier lowering (DIBL) and the variation in DIBL are found to exhibit a logarithmic dependence with drain bias in the advanced node FinFET devices. Correctly capturing the DIBL and device variation as a function of drain bias is required, as the SRAM operation voltage range is expanded. We show the improved hardware correlation in Vmin yield and the improved slow corner read performance when the Vds-dependent variation is considered. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
|