TAC-RAM: A 65nm 4Kb SRAM Computing-in-Memory Design with 57.55 TOPS/W supporting Multibit Matrix-Vector Multiplication for Binarized Neural Network
| Autor: | Xiaomeng Wang, Xuejiao Liu, Xianghong Hu, Xiaopeng Zhong, Xizi Chen, Yu Liu, Patrick Kong, Fengshi Tian, Chiying Tsui |
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| Rok vydání: | 2022 |
| Zdroj: | 2022 IEEE 4th International Conference on Artificial Intelligence Circuits and Systems (AICAS). |
| DOI: | 10.1109/aicas54282.2022.9869970 |
| Databáze: | OpenAIRE |
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