Vertically stacked gate-all-around Si nanowire transistors: Key Process Optimizations and Ring Oscillator Demonstration

Autor: Hans Mertens, Dimitri R. Kioussis, M. Kim, S. C. Chen, J. Devrajan, S. A. Chew, Nam-Sung Kim, V. Peña, Hugo Bender, A. Dangol, Gaetano Santoro, Kathy Barla, K. Kenis, P. Lagrain, r. Chiarella, Naomi Yoshida, Mikhail Korolik, Eugenio Dentoni Litta, J. Machillot, Andreas Schulze, Alessio Spessot, D. Yakimets, Steven Demuynck, K-.H. Bu, Geert Eneman, M. Cogorno, Katia Devriendt, Dan Mocuta, Romain Ritzenthaler, Naoto Horiguchi, Doyoung Jang, Shiyu Sun
Rok vydání: 2017
Předmět:
Zdroj: 2017 IEEE International Electron Devices Meeting (IEDM).
DOI: 10.1109/iedm.2017.8268511
Popis: We report on CMOS-integrated vertically stacked gate-all-around (GAA) Si nanowire (NW) MOSFETs with in-situ doped source-drain stressors and dual work function metal gates. We demonstrate that oxidation-induced SiGe/Si fin deformation by STI densification is effectively suppressed by a SiN liner. This SiN fin protection improves the controllability of nanowire formation. In addition, highly-selective Si nano-wire release and inner spacer cavity formation without Si re-flow are demonstrated. Finally, for the first time we report functional ring oscillators based on stacked Si NW-FETs.
Databáze: OpenAIRE