Scaling up the Atlas chip-multiprocessor

Autor:	D.S. Wills, P.G. Sassone
Rok vydání:	2005
Předmět:	Hardware_MEMORYSTRUCTURES Atlas (topology) Computer science Multiprocessing Parallel computing ComputerSystemsOrganization_PROCESSORARCHITECTURES Chip Theoretical Computer Science Computational Theory and Mathematics Computer architecture Hardware and Architecture Multithreading Scaling Software
Zdroj:	IEEE Transactions on Computers. 54:82-87
ISSN:	0018-9340
DOI:	10.1109/tc.2005.12
Popis:	Atlas, a dynamically multithreading chip-multiprocessor (CMP), gains little complexity as processing elements are added. When the model is scaled up with strategic layouts and realistic latencies, area and power efficiency surpass that of an aggressive out-of-order processor, though results are sensitive to global communication delay.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::03b5fb6d4db7efbe5706463481cc1664 https://doi.org/10.1109/tc.2005.12 Zobrazit plný text záznamu