| Autor: |
Yen, Anthony, Tzviatkov, P., Wong, A., Juffermans, C., Jonckheere, R., Jaenen, P., Garofalo, J., Otto, O., Ronse, K., Van den hove, L. |
| Zdroj: |
Microelectronic Engineering; January 1996, Vol. 30 Issue: 1-4 p141-144, 4p |
| Abstrakt: |
In printing random logic circuits down to 0.3 μm using i-line lithography, optical proximity correction is required to maintain across-the-chip linewidth uniformity. Using a rule-based approach with parametric anchoring, process characterization time is kept to a minimum. Corrections are more effective if post-OPC design grid sizes are kept small (∼5 nm at 1X). |
| Databáze: |
Supplemental Index |
| Externí odkaz: |
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