Controlled silicon thinning for design debug of C4 packaged ICs.
| Autor: | Goruganthu, R.R., Bruce, M., Birdsley, J., Bruce, V., Gilfeather, G., Ring, R., Antoniou, N., Salen, J., Thompson, M. |
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| Zdroj: | 1999 IEEE International Reliability Physics Symposium Proceedings 37th Annual (Cat No99CH36296); 1999, p327-332, 6p |
| Databáze: | Complementary Index |
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