An efficient methodology and semi-automated flow for design and validation of complex digital signal processing ASICS macro-cells.
| Autor: | Tambour, L., Zergainoh, N., Urard, P., Michel, H., Jerraya, A.A. |
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| Zdroj: | Proceedings of the 14th IEEE International Workshop on Rapid Systems Prototyping, 2003; 2003, p56-63, 8p |
| Databáze: | Complementary Index |
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