Investigation of poly-Si/HfO2 gate stacks in a self-aligned 70nm MOS process flow.

Autor: Kubicek, S., Chen, J., Ragnarsson, L.-A., Carter, R.J., Kaushik, V., Lujan, G.S., Cartier, E., Henson, W.K., Kerber, A., Pantisano, L., Beckx, S., Jaenen, P., Boullart, W., Caymax, M., DeGendt, S., Heyns, M., De Meyer, K.
Zdroj: ESSDERC '03. 33rd Conference on European Solid-State Device Research, 2003; 2003, p251-254, 4p
Databáze: Complementary Index