Requirement analysis for hardware and software design on FPGA-based power channel system of SMR NPP.

Autor: Maerani, Restu, Kiswanta, Kiswanta, Deswandri, Deswandri, Gusman, Ranji, Rahmatullah, Helmi Fauzi, Bakhri, Syaiful
Předmět:
Zdroj: AIP Conference Proceedings; 2024, Vol. 2967 Issue 1, p1-6, 6p
Abstrakt: The power channel measurement tools design is an effort to improve performance and safety in a nuclear reactor, in helping operators to monitor the status of the reactor. In this design, Field Programmable Gates Array (FPGA)-based system will be implemented in the power channel measurement tool design for Small Modular Reactor (SMR) reactor type. The first step that must be considered is to meet the criteria of requirements related to the design of software and hardware that will be used in the design of power channel measurement tools for SMR. FPGAs have not been widely applied to nuclear reactors in general, but to increase security of the reactor, especially with hardware-based systems, it is expected to prevent cyber-attacks, to reduce common cause failure (CCF), software obsolescence on microprocessor-based systems is also more expensive, and reduces system complexity. Therefore, verifying the software and hardware design requirements in this design must be carried out to meet the SMR NPP design criteria, especially to meet its performance when compared to microprocessor-based systems. Because this SMR NPP are planned to be developed in Indonesia, the requirements should be referred from BAPETEN as the regulatory body in Indonesia. BAPETEN and International Atomic Energy Agency (IAEA) generally discuss a lot for large Light Water Reactor (LWR) type reactors, therefore, here it is necessary to study more deeply for its use in SMR reactors. Since the monitoring process also related to the Human Machine Interface design (HMI), therefore a requirement traceability diagram are made to ensure that all the criteria and requirements have been met. [ABSTRACT FROM AUTHOR]
Databáze: Complementary Index