Design of high speed Vedic multiplier using multiplexer based adder.
Autor: | Antony, Saji. M., Prasanthi, S. Sri Ranjani, Indu, S., Pandey, Rajeshwari |
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Zdroj: | 2015 International Conference on Control Communication & Computing India (ICCC); 2015, p448-453, 6p |
Databáze: | Complementary Index |
Externí odkaz: |