Vertical field effect transistor with sub-15nm gate-all-around on Si nanowire array.
Autor: | Larrieu, G., Guerfi, Y., Han, X.L, Clement, N. |
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Zdroj: | 2015 45th European Solid State Device Research Conference (ESSDERC); 2015, p202-205, 4p |
Databáze: | Complementary Index |
Externí odkaz: |