Implementation of a burst error and burst erasure channel emulator using an FPGA architecture.
Autor: | Rigo, Massimo, Travan, Caterina, Vatta, Francesca, Babich, Fulvio |
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Zdroj: | 2014 22nd International Conference on Software, Telecommunications & Computer Networks (SoftCOM); 2014, p414-418, 5p |
Databáze: | Complementary Index |
Externí odkaz: |