Implementation of a burst error and burst erasure channel emulator using an FPGA architecture.

Autor: Rigo, Massimo, Travan, Caterina, Vatta, Francesca, Babich, Fulvio
Zdroj: 2014 22nd International Conference on Software, Telecommunications & Computer Networks (SoftCOM); 2014, p414-418, 5p
Databáze: Complementary Index