Simulation based deadlock analysis for system level designs.
| Autor: | Chen, Xi, Davare, Abhijit, Hsieh, Harry, Sangiovanni-Vincentelli, Alberto, Watanabe, Yosinori |
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| Zdroj: | Proceedings of the 42nd Annual Design Automation Conference; 6/13/2005, p260-265, 6p |
| Databáze: | Complementary Index |
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