| Autor: |
Hejazi A; Department of Electrical and Computer Engineering, Sungkyunkwan University, Suwon 16419, Korea.; SKAIChips Co., Ltd., Suwon 16419, Korea., Rad RE; Department of Electrical and Computer Engineering, Sungkyunkwan University, Suwon 16419, Korea.; SKAIChips Co., Ltd., Suwon 16419, Korea., Asl SAH; Department of Electrical and Computer Engineering, Sungkyunkwan University, Suwon 16419, Korea.; SKAIChips Co., Ltd., Suwon 16419, Korea., Choi KD; Department of Electrical and Computer Engineering, Sungkyunkwan University, Suwon 16419, Korea.; SKAIChips Co., Ltd., Suwon 16419, Korea., Yoo JM; Department of Electrical and Computer Engineering, Sungkyunkwan University, Suwon 16419, Korea.; SKAIChips Co., Ltd., Suwon 16419, Korea., Huh H; Department of Electrical and Computer Engineering, Sungkyunkwan University, Suwon 16419, Korea.; SKAIChips Co., Ltd., Suwon 16419, Korea., Kim S; Department of Electrical and Computer Engineering, Sungkyunkwan University, Suwon 16419, Korea.; SKAIChips Co., Ltd., Suwon 16419, Korea., Jung Y; Department of Electrical and Computer Engineering, Sungkyunkwan University, Suwon 16419, Korea.; SKAIChips Co., Ltd., Suwon 16419, Korea., Lee KY; Department of Electrical and Computer Engineering, Sungkyunkwan University, Suwon 16419, Korea.; SKAIChips Co., Ltd., Suwon 16419, Korea. |
| Abstrakt: |
This paper presents a radio frequency (RF) triple pole triple throw 3P3T cross antenna switch for cellular mobile devices. The negative biasing scheme was applied to improve the power-handling capability and linearity of the switch by increasing the maximum tolerable voltage drop across the drain and source and reverse biasing the parasitic junction diodes. To avoid signal reflection through the antenna in off-state, all the antenna ports were equipped with 50-ohm termination to provide the pull-down path. Considering the simultaneous operation of antenna ports in different switch cases, the presented T-type pull-down path demonstrated improvement of isolation by over 15 dB. Using stacked switches, the 3P3T handled the input power level of over 35 dBm. The chip was manufactured in 65 nm complementary metal oxide semiconductor (CMOS) silicon on insulator (SOI) technology with a die size of 790 × 730 µm. The proposed structure achieved insertion loss, isolation, and voltage standing wave ratio (VSWR) of less than -0.9 dB, -40 dB, and 1.6, respectively, when the input signal was 3.8 GHz. The measured results prove the implemented switch shows the second and third harmonic distortion performances of less than -60 dBm when the input power level and frequency are 25 dBm and 3.8 GHz, respectively. |
