Verifying the correctness of FPGA logic synthesis algorithms.

Autor: Ratchev, Boris, Hutton, Mike, Baeckler, Gregg, van Antwerpen, Babette

Publikováno v: Proceedings of the 2003 ACM/SIGDA Eleventh International Symposium: Field Programmable Gate Arrays; 2/23/2003, p127-135, 9p