Zobrazeno 1 - 10
of 134
pro vyhledávání: '"system on chip design"'
Publikováno v:
COMPEL: The International Journal for Computation and Mathematics in Electrical and Electronic Engineering, 2016, Vol. 35, Issue 3, pp. 1218-1236.
Publikováno v:
IET Cyber-Physical Systems (2018)
With the growth of complex multiprocessor system-on-chip design and the evolution of process technology, it is crucial to address thermal issues owing to the high-power density of chips. Electronic system level (ESL) design is an acknowledged effecti
Externí odkaz:
https://doaj.org/article/acea43ceb3744094992687da13dfa685
Autor:
Le Monnier Hausmann, Álvaro
With the evolution of multi-core processors, Network-on-Chip (NoC) was proposed as a solution for providing scalable interconnection fabric in Multiprocessor System-on-Chip (MP-SoC). As NoCs communicate with different components in SoCs, they are vul
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=od______3484::79e56f7f6f53d6d690a06385096a584a
https://hdl.handle.net/2117/381091
https://hdl.handle.net/2117/381091
Analysis and implementation of sdf radix-2 fft processor using verilog hardware description language
Autor:
Lai, P. H. (Phuong H.), Hoang, M. (Manh), Tran, V. Q. (Viet Q.), Nguyen, T. V. (Tung V.), Truong, T. V. (Thien V.), Nguyen, P. H. (Phong H.)
This paper will study a novel system on chip (SoC) design for fast Fourier transform (FFT) module. We first explain the role and position of FFT module in a digital intelligent system. Then, the discrete Fourier transform (DFT) and decimation in freq
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=od______2423::c3694600831d650589342a7b9e939d8a
http://urn.fi/urn:nbn:fi-fe2020112092225
http://urn.fi/urn:nbn:fi-fe2020112092225
Publikováno v:
IET Cyber-Physical Systems (2018)
With the growth of complex multiprocessor system-on-chip design and the evolution of process technology, it is crucial to address thermal issues owing to the high-power density of chips. Electronic system level (ESL) design is an acknowledged effecti
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::8d6f850683ab72f6d40d44c8cf0b643f
https://doi.org/10.1049/iet-cps.2017.0066
https://doi.org/10.1049/iet-cps.2017.0066
Publikováno v:
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. :1374-1383
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8b6b7465bd1fc37f66e7b96fe89eeb57
https://doi.org/10.1587/transfun.e100.a.1374
https://doi.org/10.1587/transfun.e100.a.1374
Akademický článek
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Publikováno v:
Journal of the Korea Institute of Information and Communication Engineering. 20:343-350
본 논문에서는 감염된 IP로부터 악성 공격을 감지하고 예방하기 위한 안전하고 효율적인 온칩버스를 기술한다. 대부분의 상호-연결 시스템(온칩버스)은 모든 데이터와 제어 신호가 밀접하
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f49c6e796f46cdc8f46d3c5447c6dd99
https://doi.org/10.6109/jkiice.2016.20.2.343
https://doi.org/10.6109/jkiice.2016.20.2.343
Publikováno v:
DATE
One of the major challenges in device down-scaling is the increase in the leakage power, which becomes a major component in the overall system power consumption. One way to deal with this problem is to introduce the concept of normally-off instant-on
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8f3bb544c596f7b2faf508d07ea536a5
https://doi.org/10.23919/date.2018.8341989
https://doi.org/10.23919/date.2018.8341989
Publikováno v:
JUCS-Journal of Universal Computer Science 24(12): 1776-1799
Scopus-Elsevier
Scopus-Elsevier
Recent processors are shrinking in size due to the advancement of technology. Reliability is an important design parameter along with power, cost, and performance. The processors need to be fault tolerant to counter reliability challenges. This work
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::ce73b787597e3a1343c0dada4263e897
https://lib.jucs.org/article/23789/
https://lib.jucs.org/article/23789/