Zobrazeno 1 - 10
of 1 277
pro vyhledávání: '"static induction transistor"'
Autor:
N. L. Lagunovich
Publikováno v:
Nauka i Tehnika, Vol 17, Iss 1, Pp 72-78 (2018)
The improved process flow differs from the known ones in the fact that the same photomask is used for formation of a channel stopper and metal contacts. Such approach has made it possible not only to decrease a number of the used phototomasks but it
Externí odkaz:
https://doaj.org/article/b6b82d8366424220b0279eae3413a24d
Autor:
Myeong-Cheol Shin, Young-Jae Lee, Dong-Hyeon Kim, Seung-Woo Jung, Michael A. Schweitz, Weon Ho Shin, Jong-Min Oh, Chulhwan Park, Sang-Mo Koo
Publikováno v:
Materials, Vol 14, Iss 5, p 1296 (2021)
In this study, static induction transistors (SITs) with beta gallium oxide (β-Ga2O3) channels are grown on a p-epi silicon carbide (SiC) layer via radio frequency sputtering. The Ga2O3 films are subjected to UV/ozone treatment, which results in redu
Externí odkaz:
https://doaj.org/article/2d348da7621c4ce1852be9ada70a16a7
Akademický článek
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Autor:
Yasunori Tanaka, Koji Yano
Publikováno v:
IEEE Transactions on Components, Packaging and Manufacturing Technology. 10:1754-1757
A 650-V and 10-A silicon carbide (SiC) stacked cascode assembly has been proposed and demonstrated, in which a low-voltage Si-MOSFET (LV Si-MOSFET) is stacked on a high-voltage SiC buried gate static induction transistor (HV SiC-BGSIT). This is achie
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7a81d7227c6f7b8e1e48daf6acb01c98
https://doi.org/10.1109/tcpmt.2020.3022083
https://doi.org/10.1109/tcpmt.2020.3022083
Publikováno v:
Materials Science Forum. 1004:985-991
Stress tests were conducted for the cascode switch using the SiC buried gate static induction transistor (SiC-BGSIT). The stress of the reverse overshoot voltage was periodically applied to the pn junction between the gate terminal and source one in
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::00c1f5b84fd82dc94bc29933e632c1cc
https://doi.org/10.4028/www.scientific.net/msf.1004.985
https://doi.org/10.4028/www.scientific.net/msf.1004.985
Autor:
Chuan Liu
Publikováno v:
Organic and Hybrid Field-Effect Transistors XX.
Vertical organic field effect transistors (VOFET) and vertical static induction transistor (VSIT) have shown the advances of large on-current, high compatibility with sensors, ease of solution-processing and good mechanical flexibility. However, ther
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5d01d097805a4576e4a57f7e3243a42d
https://doi.org/10.1117/12.2597195
https://doi.org/10.1117/12.2597195
Publikováno v:
MRS Advances. 4:2377-2382
In this paper we report high voltage MOS and Schottky Diode CV techniques for silicon and SiC power devices. 4H Silicon carbide is a wide bandgap semiconductor suitable for high voltage power electronics and RF applications due to high avalanche brea
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9726dd443f4ba1b678bfbbbf674c7c80
https://doi.org/10.1557/adv.2019.224
https://doi.org/10.1557/adv.2019.224
Publikováno v:
Solid State Electronics Letters, Vol 1, Iss 2, Pp 45-51 (2019)
Power dissipation obstacle in electronic devices is strongly related to their internal breakdown mechanism. The Static Induction Transistor optimization imposes to reach p-gate regions as deep as vertical as possible. These objectives can be achieved
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::72340ec67531f62d01fa3c62d6c770e7
https://doi.org/10.1016/j.ssel.2019.07.001
https://doi.org/10.1016/j.ssel.2019.07.001
Publikováno v:
IEEE Electron Device Letters. 40:259-262
Vertical gallium nitride (GaN) nanowire static induction transistors (SITs) are proposed and realized for micro display for the first time. A top-down dry etch was employed to form the GaN nanowires with height of $\sim 1.5~\mu \text{m}$ and diameter
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1054393e7176e37afde02d6f7e710772
https://doi.org/10.1109/led.2018.2886246
https://doi.org/10.1109/led.2018.2886246
Publikováno v:
IEEE Electron Device Letters. 39:1892-1895
A 35-A cascode configuration of a drain-to-source breakdown voltage of 978 V utilizing an silicon carbide (SiC) buried gate static induction transistor (BGSIT) and low voltage Si-MOSFET (SiC-BGSIT cascode) has been experimentally demonstrated for the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::aa34dec8b6c98e95c5cf67bfe1a18b19
https://doi.org/10.1109/led.2018.2878933
https://doi.org/10.1109/led.2018.2878933