Relaxation of Self-Heating-Effect for Stacked-Nanowire FET and p/n-Stacked 6T-SRAM Layout

Autor: Eisuke Anju, Iriya Muneta, Kuniyuki Kakushima, Kazuo Tsutsui, Hitoshi Wakabayashi

Publikováno v: IEEE Journal of the Electron Devices Society, Vol 6, Pp 1239-1245 (2018)

In this paper, we investigated the source/drain recessed contact structure to mitigate the self-heating-effects in vertically stacked-nanowire FETs. As a result, lattice temperature of nanowire regions during device operation was considerably decreas

Externí odkaz: https://doaj.org/article/ce1ee70626f74aaeaca5484246517df9

Relaxation of Self-Heating-Effect for Stacked-Nanowire FET and p/n-Stacked 6T-SRAM Layout

Autor: Hitoshi Wakabayashi, Kazuo Tsutsui, Eisuke Anju, Kuniyuki Kakushima, Iriya Muneta

Publikováno v: IEEE Journal of the Electron Devices Society, Vol 6, Pp 1239-1245 (2018)

In this paper, we investigated the source/drain recessed contact structure to mitigate the self-heating-effects in vertically stacked-nanowire FETs. As a result, lattice temperature of nanowire regions during device operation was considerably decreas

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::1dda8f28a821a2cadd2ce1c3a4129e63
http://t2r2.star.titech.ac.jp/cgi-bin/publicationinfo.cgi?q_publication_content_number=CTT100813953

Hydrogen silsesquioxane tri-dimensional advanced patterning concepts for high density of integration in sub-7 nm nodes

Autor: B. Hemard, Sébastien Barnola, L. Gaben, S. Pauliac, Virginie Loup, C. Euvrard, J.-A. Dallery, Y. Exbrayat, M.-P. Samson, Thomas Skotnicki, Christian Arvet, M. Vinet, X. Bossy, C. Vizioz, L. Koscianski, Frederic Boeuf, C. Perrot, R. Dechanoz, J. Bustos, B. Previtali, B. Perrin, V. Balan, Francis Balestra, James C. Sturm, S. Barraud, Stephane Monfray, Pascal Besson

Publikováno v: 2017 EUROSOI-ULIS Proceedings
2017 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS)
2017 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), Apr 2017, Athens, Greece. pp.120-123, ⟨10.1109/ULIS.2017.7962617⟩

Best paper award; session 9: Novel Materials and Technologies; International audience; Recent developments in CMOS devices such as FinFET, FDSOI or stacked nanowire FETs (SNWFETs) have led the industry to consider increasingly complex integration pro

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::ca7595340398bf8248e822cfce7e8ba8
https://hal.archives-ouvertes.fr/hal-02014232

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