Zobrazeno 1 - 10
of 2 215
pro vyhledávání: '"gate all-around"'
Autor:
Jyi-Tsong Lin, Wei-Heng Tai
Publikováno v:
Discover Nano, Vol 19, Iss 1, Pp 1-20 (2024)
Abstract In this paper, we introduce a novel Forkshape nanosheet Inductive Tunnel Field-Effect Transistor (FS-iTFET) featuring a Gate-All-Around structure and a full-line tunneling heterojunction channel. The overlapping gate and source contact regio
Externí odkaz:
https://doaj.org/article/cba3c7112606408cbc1aad648e6e763a
Autor:
Hakkee Jung
Publikováno v:
AIMS Electronics and Electrical Engineering, Vol 8, Iss 2, Pp 211-216 (2024)
An analytical subthreshold swing (SS) model has been presented to determine the SS of an elliptic junctionless gate-all-around field-effect transistor (GAA FET). The analysis of a GAA FET with an elliptic cross-section is essential because it is diff
Externí odkaz:
https://doaj.org/article/02a2c1cdc1994aadb8f3cb3d2ac66172
Autor:
Hima Bindu Valiveti, Indr Jeet Rajput, N. Udaya Kumar, Harsh Lohiya, R. Sri Uma Suseela, Atul Singla, Saurabh Rajvanshi
Publikováno v:
Cogent Engineering, Vol 11, Iss 1 (2024)
When developing a nano-chip, nano-electronics and its principles play a vital role in resultant circuit construction using numerous components. The channel spacing, length and height of the components is measured in nanometre (nm). These nm-sized cha
Externí odkaz:
https://doaj.org/article/e98e4e1ce6294f4790a7303cc1deee49
Autor:
Zhanhang Chen, Haoliang Shan, Ziyi Ding, Xia Wu, Xiaolin Cen, Xiaoyu Ma, Wanling Deng, Junkai Huang
Publikováno v:
IEEE Journal of the Electron Devices Society, Vol 12, Pp 948-955 (2024)
A closed-form, analytical, and unified model for the surface potential from source to drain in nanowire (NW) gate-all-around (GAA) tunneling field effect transistors (TFETs) is proposed and validated. Foremost, the correctness of the dual modulation
Externí odkaz:
https://doaj.org/article/1d9adcd9dfc04d16848f5e967acd1d2d
Publikováno v:
IEEE Journal of the Electron Devices Society, Vol 12, Pp 941-947 (2024)
The kink effect of gate-all-around (GAA) MOSFET has been experimentally validated by our GAA devices fabricated on a void embedded silicon-on-insulator (VESOI) substrate. In this VESOI GAA device, a consistent and favorable decrease in subthreshold s
Externí odkaz:
https://doaj.org/article/ade47bb3d02c4bd2b94e019a0e3a42b1
Autor:
Hyeong-Chan Son, Hyunwoo Kim
Publikováno v:
IEEE Access, Vol 12, Pp 145393-145399 (2024)
In this study, single-event transient (SET) characteristics in tunneling-based ternary complementary MOS device (T-CMOS) with gate-all-around structure (i.e., nanosheet FET) were analyzed for the first time. For low power computing systems, the trans
Externí odkaz:
https://doaj.org/article/11fb6963d4c64a0a989683d2ae32b1e7
Publikováno v:
IEEE Journal of the Electron Devices Society, Vol 12, Pp 770-774 (2024)
Impact of strain of sub-3 nm gate-all-around (GAA) CMOS transistors on the circuit performance is evaluated using a neural compact model. The model was trained using 3D technology computer-aided design (TCAD) device simulation data of GAA field-effec
Externí odkaz:
https://doaj.org/article/6c071d2c300e4f238f314d4c7ad003f4
Autor:
Minji Bang, Jonghyeon Ha, Minki Suh, Dabok Lee, Minsang Ryu, Jin-Woo Han, Hyunchul Sagong, Hojoon Lee, Jungsik Kim
Publikováno v:
IEEE Access, Vol 12, Pp 130347-130355 (2024)
The effects of single event upset (SEU) by alpha particles and heavy ions on the data flip of a 3 nm technology node gate-all-around (GAA) nanosheet field-effect transistor (NSFET) 6T static random-access memory (SRAM) cell was studied through techno
Externí odkaz:
https://doaj.org/article/c729c86dcf4b40dd8aafed6967dcc577
Publikováno v:
IEEE Journal of the Electron Devices Society, Vol 12, Pp 479-485 (2024)
The scaling of nanosheet (NS) field effect transistors (FETs) from the 12 nm gate length to the ultimate gate length of 10 nm for sub-2 nm nodes brings additional technological challenges. Here, 3D finite element Monte Carlo simulations are employed
Externí odkaz:
https://doaj.org/article/36b67397a7ac43a5aec29b1814884559
Autor:
Chi-Cheng Tien, Yu-Hsien Lin
Publikováno v:
IEEE Access, Vol 12, Pp 83629-83637 (2024)
Tunneling Field-Effect Transistors (TFET) have emerged as promising candidates for integrated circuits beyond conventional metal-oxide-semiconductor field-effect transistors (MOSFET) and could overcome the physical limit, which results in the Subthre
Externí odkaz:
https://doaj.org/article/bd1558ce295b4c2aab846b3190832d35