Zobrazeno 1 - 2
of 2
pro vyhledávání: '"decreasing of dimensions of transistor"'
Autor:
E.L.Pankratov, E.A.Bulaeva
Publikováno v:
International Journal on Computational Science & Applications. 5:01-18
In this paper we consider manufacturing logical elements with function AND-NOT based on bipolar transistors. Based on recently considered approach to decrease dimensions of solid state electronic devices with the same time increasing of their perform
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::2fe14d6a5118d6c3d26777818d3d75c5
https://doi.org/10.5121/ijcsa.2015.5401
https://doi.org/10.5121/ijcsa.2015.5401
Autor:
Pankratov E.L, Bulaeva E.A
We introduce an approach of manufacturing of a field-effect heterotransistor with inhomogenous doping of channel. The inhomogenous distribution of concentration of dopant gives a possibility to change speed of transport of charge carriers and to decr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::903f582381486ef165613c751158293a
https://zenodo.org/record/1473890
https://zenodo.org/record/1473890
