Zobrazeno 1 - 3
of 3
pro vyhledávání: '"automatic clock skew control"'
Autor:
Luke, Brian L.
This dissertation investigates a mixed-signal, electronic warfare (EW) system-on-a-chip (SoC) design capable of synthesizing false radar returns in response to imaging radar interrogations that, when integrated into the range-Doppler processing, form
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=od______2778::350faa280119f8c88d106fb98b40050e
https://hdl.handle.net/10945/9908
https://hdl.handle.net/10945/9908
Publikováno v:
Proceedings of 13th Annual IEEE International ASIC/SOC Conference (Cat. No.00TH8541); 2000, p248-252, 5p
Publikováno v:
Proceedings of 13th Annual IEEE International ASIC/SOC Conference (Cat. No.00TH8541).
This paper presents an automatic clock skew control scheme in an SoC ASIC that inserts appropriated delays on the outputs of the clock generator such that the target module clocks MCK-1 through MCK-n are all in phase (or 1800 out of phase) with PLL's