Zobrazeno 1 - 5
of 5
pro vyhledávání: '"Zoe Mutsafi"'
Autor:
Yakov Roizin, Yossi Rosenwaks, Zoe Mutsafi, Klimentiy Shimanovich, Victor Kairys, R. Shima-Edelstein
Publikováno v:
IEEE Transactions on Electron Devices. 68:5695-5700
This article reports on the high-temperature (HT) operation (25 °C–400 °C) and temperature sensing mechanism of a depletion-mode AlGaN/GaN metal–insulator–semiconductor (MIS) high-electron-mobility transistor (depletion mode (D-mode) AlGaN/Ga
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b2cfe023ae9dd3dd5b6be4565d814e36
https://doi.org/10.1109/ted.2021.3109848
https://doi.org/10.1109/ted.2021.3109848
Autor:
Yossi Rosenwaks, M. Shach-Caplan, E. Pikhay, Klimentiy Shimanovich, Yakov Roizin, Zoe Mutsafi
Publikováno v:
IEEE Transactions on Electron Devices. 66:3549-3553
Electrostatically formed nanowire (EFN) transistor is a majority carrier silicon-on-insulator (SOI) device, operated in the depletion mode, with the conducting channel size and position modulated by surrounding gates. When operated in the subthreshol
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::53ca26b2d61db4d978abf24a76ad1c88
https://doi.org/10.1109/ted.2019.2919389
https://doi.org/10.1109/ted.2019.2919389
Publikováno v:
Engineering Research Express. 2:035005
This paper presents a novel micro-bolometer structure based on SOI gate all around Electrostatically Formed Nanowire (GAA EFN) transistors. The new design enables formation of the EFN conductive channels in the volume of the SOI devices layers, far f
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::df1df039c0831e07f5b5f754fbe5fe8e
https://doi.org/10.1088/2631-8695/aba090
https://doi.org/10.1088/2631-8695/aba090
Publikováno v:
Journal of Physics D: Applied Physics. 53:065101
This paper reports a novel low voltage low power (LVLP) temperature sensor with 300-370K operating temperature range based on a silicon-on-insulator (SOI) nanowire FET (NWFET) with standard SOI CMOS technology. The novel design combines a top-down si
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::07aa25b1ff942acea5136ac10212471a
https://doi.org/10.1088/1361-6463/ab57df
https://doi.org/10.1088/1361-6463/ab57df
Publikováno v:
Journal of Physics D: Applied Physics; 2/6/2020, Vol. 53 Issue 6, p1-1, 1p