Zobrazeno 1 - 10
of 24
pro vyhledávání: '"Zigang Xiao"'
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 32:1228-1239
Double patterning lithography (DPL) technologies have become a must for today's sub-32 nm technology nodes. Currently, there are two leading DPL technologies: self-aligned double patterning (SADP) and litho-etch-litho-etch (LELE). Among them, SADP ha
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ec3cafce9056870c95ce19075c19b738
https://doi.org/10.1109/tcad.2013.2252054
https://doi.org/10.1109/tcad.2013.2252054
Publikováno v:
ASP-DAC
Multiple patterning lithography has been widely adopted for today's circuit manufacturing. However, increasing the number of masks will make the manufacturing process more expensive. More importantly, towards 7 nm technology node, the accumulated ove
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::de660b60dda05937451da170329c4c07
https://doi.org/10.1109/aspdac.2016.7427995
https://doi.org/10.1109/aspdac.2016.7427995
Autor:
Evangeline F. Y. Young, Zigang Xiao
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 30:1000-1010
Computer-aided design problems of digital microfluidic biochips are receiving much attention, and most of the previous works focus on direct-addressing biochips. In this paper, we solve the placement and droplet routing problem in cross-referencing b
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f40978cf41ef4efca365c941de978f5e
https://doi.org/10.1109/tcad.2011.2113730
https://doi.org/10.1109/tcad.2011.2113730
Publikováno v:
DAC
Recently, block copolymer directed self-assembly (DSA) has demonstrated great advantages in patterning contacts/vias for the 7 nm technology node and beyond. The high throughput and low process cost of DSA makes it the most promising candidate in pat
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1a44602cf6cdc97132961217197624aa
https://doi.org/10.1145/2744769.2747934
https://doi.org/10.1145/2744769.2747934
Publikováno v:
ASP-DAC
Directed Self-Assembly (DSA) is a promising technique for contacts/vias patterning in 7 nm technology nodes. In DSA process, groups of contact holes/vias are generated by the self-assembly process guided by the ‘guiding templates’. The guiding te
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8dab42750c4bd93d354e17b493e28dab
https://doi.org/10.1109/aspdac.2015.7059081
https://doi.org/10.1109/aspdac.2015.7059081
Publikováno v:
2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cadd596047675b599465244784f9f95b
https://doi.org/10.1109/iccad.2014.7001341
https://doi.org/10.1109/iccad.2014.7001341
Autor:
Haitong Tian, He Yi, Yuelin Du, H.-S. Philip Wong, Martin D. F. Wong, Zigang Xiao, Hongbo Zhang
Publikováno v:
DAC
Directed Self-Assembly (DSA) is a promising technique for contacts/vias patterning, where groups of contacts/vias are patterned by guiding templates. As the templates are patterned by traditional lithography, their shapes may vary due to the process
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d647d2b2dbc5289e7bf69e7b28e6800c
https://doi.org/10.1145/2593069.2593125
https://doi.org/10.1145/2593069.2593125
Publikováno v:
SPIE Proceedings.
At the 7 nm technology node, the contact layers of integrated circuits (IC) are too dense to be printed by single exposure lithography. Block copolymer directed self-assembly (DSA) has shown its advantage in contact/via patterning with high throughpu
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::510a20094f9272bc2c1cabd88ada6453
https://doi.org/10.1117/12.2045691
https://doi.org/10.1117/12.2045691
Publikováno v:
SPIE Proceedings.
As we advances into 14/10nm technology node, single patterning technology is far from enough to fabricate thefeatures with shrinking feature size. According to International Technology Roadmap for Semiconductors in2011, 1 double patterning lithograph
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0bcd506f23bc0768917f169d2bd92f72
https://doi.org/10.1117/12.2046499
https://doi.org/10.1117/12.2046499
Publikováno v:
SPIE Proceedings.
In detailed routing for integrated circuit (IC) designs, vias are usually randomly inserted in order to connect between di erent routing layers. In the 7 nm technology node and beyond, the wire pitch is below 40 nm, and consequently, the vias become
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6126ebb18e910110abe5e286d96547e9
https://doi.org/10.1117/12.2045756
https://doi.org/10.1117/12.2045756