Zobrazeno 1 - 10
of 10
pro vyhledávání: '"Zephyr Liu"'
Autor:
Yonglei Li, Justin Lim, Nahee Park, Yuqian Zhang, Xiaolei Liu, Yasutaka Okada, Gloria Chen, Ben McClain, Erin Hollinger, Amy Weatherly, Yoav Grauer, Zephyr Liu, Raviv Yohanan, Greg Gray, Mark Stakely, Shlomit Katz, Mahendra Dubey, Neeraj Khanna
Publikováno v:
Metrology, Inspection, and Process Control XXXVII.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::39ecc234e729959f89f7f81b2cb68eb6
https://doi.org/10.1117/12.2658074
https://doi.org/10.1117/12.2658074
Autor:
Nahee Park, Dohwa Lee, Liu Liu, Xuefei Zhou, Hongpeng Su, DongSub Choi, Wayne Zhou, Hedvi Spielberg, Efi Megged, Chen Dror, Diana Shaphirov, Zephyr Liu, Mark Ghinovker, DongYoung Lee, Hongbok Yeon, Hyunjun Kim, Sukwon Park, Bohye Kim, Honggoo Lee, Sangho Lee
Publikováno v:
Metrology, Inspection, and Process Control XXXVI.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::87c2c7efc3be8f8bbcc7e2039896893f
https://doi.org/10.1117/12.2608053
https://doi.org/10.1117/12.2608053
Autor:
Katya Gordon, Hedvi Spielberg, Diana Shaphirov, Xiaolei Liu, Eltsafon Ashwal, Eitan Hajaj, Philippe Leray, Mark Ghinovker, Chen Dror, Raviv Yohanan, Zephyr Liu, Dieter Van den Heuvel, Roel Gronheid
Publikováno v:
Metrology, Inspection, and Process Control for Semiconductor Manufacturing XXXV.
As design nodes of advanced semiconductor chips shrink, reduction in on-product overlay (OPO) budget becomes more critical to achieving higher yield. Imaging-based overlay (IBO) targets usually consist of periodic patterns where their pitches are res
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7a71df7b888ddfb6580f81ecc9e7b9d1
https://doi.org/10.1117/12.2585876
https://doi.org/10.1117/12.2585876
Autor:
Mark Ghinovker, Katya Gordon, Eltsafon Ashwal, Eitan Hajaj, Isaac Salib, Raviv Yohanan, Xiaolei Liu, Chen Dror, Zephyr Liu, Diana Shaphirov
Publikováno v:
Metrology, Inspection, and Process Control for Semiconductor Manufacturing XXXV.
In recent years, simulation-based analysis has become an integral phase in metrology targets design process, performances optimization wise to support on product overlay (OPO) reduction, accuracy and robustness to process variation. Moreover, a simul
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3138996e91dd72b952a0be9774c46313
https://doi.org/10.1117/12.2584525
https://doi.org/10.1117/12.2584525
Autor:
Chanha Park, Xiaolei Liu, Dongyoung Lee, Chen Dror, Eltsafon Ashwal, Dongsoo Kim, Sanghuck Jeon, Zephyr Liu, Katya Gordon, Honggoo Lee, Eitan Hajaj, Mark Ghinovker, Diana Shaphirov, Sang-Ho Lee, Dongsub Choi, Dohwa Lee, Raviv Yohanan
Publikováno v:
Metrology, Inspection, and Process Control for Semiconductor Manufacturing XXXV.
Reduction in on product overlay (OPO) is a key component for high-end, high yield integrated circuit manufacturing. Due to the continually shrinking dimensions of the IC device elements it has become near-impossible to measure overlay on the device i
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0c6be2fb79531aea498fc923d2afaeb1
https://doi.org/10.1117/12.2584524
https://doi.org/10.1117/12.2584524
Publikováno v:
Metrology, Inspection, and Process Control for Microlithography XXXIV.
On product overlay (OPO) shrink is a key enabler to achieve high yield in integrated circuit manufacturing. One of the key factors to enable accurate measurement on grid (target) is the use of optimized overlay (OVL) mark design to achieve low OPO. T
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::341ce5481a598e5183ed2d8a900dfdff
https://doi.org/10.1117/12.2552000
https://doi.org/10.1117/12.2552000
Autor:
Chanha Park, Minhyung Hong, Sangjun Han, John C. Robinson, Jieun Lee, Tal Marciano, Zephyr Liu, Dana Klein, Dongsub Choi, Roie Volkovich, Ahlin Choi, Hao Mei, Eitan Hajaj, Dohwa Lee, Lilach Saltoun, Jung-Tae Lee, Eitan Herzel, Wayne (Wei) Zhou, Dongyoung Lee, Anna Golotsvan, Jeongpyo Lee, Honggoo Lee, Eran Amit, Sanghuck Jeon, Seongjae Lee
Publikováno v:
Metrology, Inspection, and Process Control for Microlithography XXXIII.
Overlay process control is a critical aspect of integrated circuit manufacturing. Advanced DRAM manufacturing overlay error budget approaches the sub-2nm threshold, including all sources of overlay error: litho processing, non-litho processing, metro
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a8a0933a14a7bfd8a38c5715b72d8f3f
https://doi.org/10.1117/12.2515015
https://doi.org/10.1117/12.2515015
Autor:
Roie Volkovich, Eran Amit, Jungtae Lee, Einat Peled, Sangjun Han, Sanghuck Jeon, Minhyung Hong, Jieun Lee, Seungyoung Kim, Seongjae Lee, Tal Yaziv, Honggoo Lee, Dana Klein, Dongsub Choi, Anat Marchelli, Alexander Svizher, Dongyoung Lee, Dohwa Lee, Yuval Lamhot, Aaron Cheng, Ahlin Choi, Eungryong Oh, Jeongpyo Lee, John C. Robinson, Zephyr Liu
Publikováno v:
Metrology, Inspection, and Process Control for Microlithography XXXII.
In overlay (OVL) metrology the quality of measurements and the resulting reported values depend heavily on the measurement setup used. For example, in scatterometry OVL (SCOL) metrology a specific target may be measured with multiple illumination set
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2790de4e8c4d0bdd133a3ff51e49279a
https://doi.org/10.1117/12.2300507
https://doi.org/10.1117/12.2300507
Autor:
Michael E. Adel, Mark D. Smith, Sangjun Han, Dongsub Choi, Myungjun Lee, Efi Megged, Anna Golotsvan, Joonseuk Lee, Tal Itzkovich, Amnon Manassen, Yuri Paskover, Victoria Naipak, Dohwa Lee, Tom Leviant, Honggoo Lee, Zephyr Liu, Vladimir Levinski, Mi-Rim Jung, Young-Sik Kim
Publikováno v:
SPIE Proceedings.
In recent years, lithographic printability of overlay metrology targets for memory applications has emerged as a significant issue. Lithographic illumination conditions such as extreme dipole, required to achieve the tightest possible pitches in DRAM
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::305ceb1659a85f9daa6b6d66fd9b6170
https://doi.org/10.1117/12.2258376
https://doi.org/10.1117/12.2258376
Autor:
Dongsub Choi, Myungjun Lee, Zephyr Liu, Vladimir Levinski, Michael E. Adel, Tal Itzkovich, Sangjun Han, Mi-Rim Jung, Young-Sik Kim, Kangsan Lee, Mark D. Smith, Ady Levy, Dohwa Lee, Honggoo Lee, Joonseuk Lee
Publikováno v:
SPIE Proceedings.
We present a metrology target design (MTD) framework based on co-optimizing lithography and metrology performance. The overlay metrology performance is strongly related to the target design and optimizing the target under different process variations
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e44c54bc168e356e764d66526b929b5c
https://doi.org/10.1117/12.2218653
https://doi.org/10.1117/12.2218653