Zobrazeno 1 - 10
of 17
pro vyhledávání: '"Zaveri, Mazad S."'
Publikováno v:
In Transportation Engineering December 2023 14
Akademický článek
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Autor:
Soni, Pushtivardhan
Publikováno v:
IndraStra Global.
This work considers the use of commodity graphics processing units (GPUs) for accelerating run-time critical phase of method of moments (MoM) which is a widely used computational electromagnetic (CEM) technique for solving electromagnetic problems go
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=issn23813652::98158ae9fcfda57c39e63e4ab427f1fd
http://drsr.daiict.ac.in/handle/123456789/544
http://drsr.daiict.ac.in/handle/123456789/544
Autor:
Patel, Jayendra
Publikováno v:
IndraStra Global.
In this thesis, we have particularly focussed on the aspects of the hardware implementation of the Bayesian inference framework within the George and Hawkins’ model. This framework is based on Judea Pearl’s belief propagation. Then we have presen
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=issn23813652::1faf946c74a1103d472fe38cd6630259
https://igi.indrastra.com/items/show/141825
https://igi.indrastra.com/items/show/141825
Autor:
Dalal, Tejas D.
Publikováno v:
IndraStra Global.
A general methodology has implemented on several Processing Nodes (PN) to be connected to form an Artificial Neural Network (ANN). This design has multiple Activation functions on the same architecture which makes it different from the currently exis
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=issn23813652::cf8cc8cff0f5f48e64db0b5e6f3fcc9c
https://igi.indrastra.com/items/show/141902
https://igi.indrastra.com/items/show/141902
Autor:
Kacheria, Rachit M.
Publikováno v:
IndraStra Global.
The objective of this paper is to implement and analyze the palm associative memory proposed by G. Palm [1]. In this paper, a design implementation of this algorithm, based on Verilog HDL (hardware description language) and MATLAB programming languag
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=issn23813652::b298326ad761d60379bf5a79b634efe9
http://drsr.daiict.ac.in/handle/123456789/426
http://drsr.daiict.ac.in/handle/123456789/426
Autor:
Vyas, Pavan R.
Publikováno v:
IndraStra Global.
The main intention of this thesis is to give the basic information about the implementation of a node of one of the neural network algorithms. The main purpose of this thesis is to design, implement and analyze the node of the HTM (Hierarchical Tempo
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=issn23813652::5cc7f0685686be6396515a08e2043db0
http://drsr.daiict.ac.in/handle/123456789/420
http://drsr.daiict.ac.in/handle/123456789/420
Autor:
Rupapara, Kripal D.
Publikováno v:
IndraStra Global.
In Morden times power dissipation in electronic circuits has become more important due to increase use of portable and handheld devices. Increased operating frequency results in more power consumption in almost every VLSI circuits. Scaling in integra
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=issn23813652::cc85cb263182ede84b7f71e16b816b37
http://drsr.daiict.ac.in/handle/123456789/422
http://drsr.daiict.ac.in/handle/123456789/422
Autor:
Dobaria, Renish
Publikováno v:
IndraStra Global.
So many different circuits and different schemes are applied to make circuit faster and less power consumptive. In this thesis, 16-bit dual threshold voltage conditional carry adder, with two proposed modification for improved performance, is present
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=issn23813652::8bcac5fc36dd95cd6a7e7a504dcca588
https://igi.indrastra.com/items/show/141708
https://igi.indrastra.com/items/show/141708