Zobrazeno 1 - 10
of 1 832
pro vyhledávání: '"ZEDBOARD"'
Autor:
Šagud, Karlo
U sklopu diplomskog rada razvijen je edukacijski evaluacijski sustav s perifernim proširenjima koji se putem Pmod priključaka spaja na ZedBoard. Sustav je implementiran u obliku dvoslojne tiskane pločice, na kojoj se nalaze grafički pokaznik s te
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::1ac840dc7b9899686bd4179861bacf9f
https://www.bib.irb.hr/1254611
https://www.bib.irb.hr/1254611
Autor:
Gašparović, Matej
U sklopu ovog rada razvijeno je sklopovlje i pripadajuća programska podrška sučelja namijenjenog programski definiranom radiju. Kao platforma odabran je razvojni sustav ZedBoard. Za korisničko sučelje korišten je grafički pokaznik s tekućim k
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::8f439d6968da387cba4109eed4fa33f6
https://repozitorij.fer.unizg.hr/islandora/object/fer:9824/datastream/PDF
https://repozitorij.fer.unizg.hr/islandora/object/fer:9824/datastream/PDF
Autor:
Bello, N., Uwuigbe, E.O.
This paper presents the design and implementation of a face recognition system on a ZEDboard embedded system. The study utilized a Xilinx-zynq-z7020 system-on-a-chip (SoC) in the ZEDboard which ran the Xillinus operating system (OS) to design a facia
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::96e717d30ca84bc8927f27546674f02c
Autor:
CYUAN-YOU YUAN, 袁全佑
106
The experiment as an example of hardware acceleration based on the hardware structure of the FIR filter which is implemented in the ZedBoard embedded platform. The hardware architecture will mainly use pipeline and pipeline combination of th
The experiment as an example of hardware acceleration based on the hardware structure of the FIR filter which is implemented in the ZedBoard embedded platform. The hardware architecture will mainly use pipeline and pipeline combination of th
Externí odkaz:
http://ndltd.ncl.edu.tw/handle/7ekje4
Autor:
Chrishia Christudhas, Annis Fathima
Publikováno v:
Scientific Reports, Vol 14, Iss 1, Pp 1-13 (2024)
Abstract The prominence of image processing in today’s cutting-edge technology is undeniable. Integrating software with hardware leverages both strengths, resulting in a real-time processing system that is efficient and streamlined. Raw images are
Externí odkaz:
https://doaj.org/article/be18344cc28044c7bc6a812f2e16c23a
Akademický článek
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Autor:
Ko,Hsiang-Yu, 柯享雨
104
In this thesis, we present a solution for running Heterogeneous System Architecture (HSA) Runtime on ZedBoard to cooperate with the GPU that will be designed on FPGA in the near future. The contemporary sample code for running Heterogeneous
In this thesis, we present a solution for running Heterogeneous System Architecture (HSA) Runtime on ZedBoard to cooperate with the GPU that will be designed on FPGA in the near future. The contemporary sample code for running Heterogeneous
Externí odkaz:
http://ndltd.ncl.edu.tw/handle/27704087441346778573
Co-Simulation of DC-DC Converter with Xilinx Zedboard Zynq-7000 FPGA Based Perturb&Observe Algorithm
Autor:
Ebru DOĞAN, Göksu GÖREL
Publikováno v:
Uluslararası Muhendislik Arastirma ve Gelistirme Dergisi. 14:872-883
Bu makalede bir fotovoltaik enerji sisteminde yer alan DC-DC yükselten dönüştürücünün değiştir & gözle algoritması ile çalışmasının co-simülasyonu gerçekleştirilmiştir. İlk olarak fotovoltaik bir güç sistemi Simulink ortamınd
Autor:
Shih-Kao Tai, 戴世高
102
This work is an Internet of Things (IoT) implementation made by embedded system platform, Zedboard, becomes a concentration station for Tele-homecare application The purpose of this work is to find solutions in staging areas. One of the IoT
This work is an Internet of Things (IoT) implementation made by embedded system platform, Zedboard, becomes a concentration station for Tele-homecare application The purpose of this work is to find solutions in staging areas. One of the IoT
Externí odkaz:
http://ndltd.ncl.edu.tw/handle/m4dxzb
Akademický článek
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