Zobrazeno 1 - 10
of 251
pro vyhledávání: '"Z, Yamazaki"'
Publikováno v:
IEICE Transactions on Electronics. :1266-1272
A monolithic modulator driver IC based on InP HBTs with a new circuit topology — called a functional distributed circuit (FDC) — for over 80-Gb/s optical transmission systems has been developed. The FDC topology includes a wide-band amplifier des
Autor:
Kenichi Hosoya, Nobuhiro Kawahara, Risato Ohhira, Hiroshi Yamaguchi, H. Ikeda, Tomoyuki Yamase, Akira Tanabe, Shunichi Kaeriyama, Z. Yamazaki, Sadao Fujita, A. Noda, T. Takahashi, Hiroaki Shoda, Yasushi Amamiya, Kenichiro Hijioka, Hidemi Noguchi, M. Okamoto, S. Tomari, Shinichi Tanaka
Publikováno v:
IEEE Journal of Solid-State Circuits. 44:3568-3579
A fully integrated 40 Gb/s transmitter and receiver chipset with SFI-5 interface is implemented in a 65 nm CMOS technology and mounted in a plastic BGA package. The transmitter chip provides good jitter performance with a 40 GHz full-rate clock archi
Publikováno v:
IEEE Journal of Solid-State Circuits. 42:2594-2599
A 1:2 demultiplexer (DEMUX) IC based on InP HBT technology and operating over 100 Gb/s was developed. This IC provides high-speed operation with high signal quality and a wide timing margin by means of broadband impedance matching with double termina
Autor:
Yasuyuki Suzuki, A. Fujihara, Kenichi Hosoya, Shinichi Tanaka, Masafumi Kawanaka, Yasushi Amamiya, M. Mamada, Z. Yamazaki, Shigeki Wada, Hikaru Hida
Publikováno v:
IEICE Transactions on Electronics. :1685-1694
Application of microwave and millimeter-wave circuit technologies to InGaP-HBT ICs for 40-Gbps optical-transmission systems is demonstrated from two aspects. First, ICs for various important functions-amplification of data signals, amplification, fre
Publikováno v:
IEEE Journal of Solid-State Circuits. 40:2111-2117
We implemented a low-voltage latch circuit topology in a full-rate 4:1 multiplexer (MUX) using InP-HBT technology. The proposed latch circuitry incorporates parallel current switching together with inductive peaking a combination that makes it suitab
Autor:
C. Kurioka, Hiroaki Uchida, Z. Yamazaki, Yasuyuki Suzuki, Shigeki Wada, Yasushi Amamiya, Hikaru Hida, Shinichi Tanaka
Publikováno v:
IEEE Journal of Solid-State Circuits. 39:2397-2402
InP HBT ICs capable of 120-Gb/s multiplexing and 110-Gb/s demultiplexing operation have been developed. They feature a direct-drive series-gating configuration selector, an asymmetrical latch flip-flop, and broadband impedance matching with inverted
Autor:
Akira Tanabe, A. Noda, Sadao Fujita, Risato Ohhira, Hidemi Noguchi, Hiroshi Yamaguchi, Tomoyuki Yamase, Z. Yamazaki, Hiroaki Shoda, H. Ikeda, M. Okamoto, S. Tomari, Shinichi Tanaka, Shunichi Kaeriyama, Nobuhiro Kawahara, K. Hosoya, T. Takahashi, K. Hijioka, Yasushi Amamiya
Publikováno v:
ISSCC
As 40Gb/s optical communication systems enter the commercial stage, the transceiver, which is a key component of these systems, requires lower power dissipation, a size reduction, and a wider frequency range to meet the requirements of several standa
Publikováno v:
2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers..
A 100-Gbit/s 1:2 demultiplexer (DEMUX) has been developed using InP HBT technology. The IC features broadband impedance matching with double terminations and transmission lines with a low phase constant in the data and clock distributions to obtain h
Publikováno v:
RFIC) Symposium, 2005. Digest of Papers. 2005 IEEE Radio Frequency integrated Circuits.
A driver IC based on InP HBTs with a new circuit topology - called functional distributed circuit (FDC) - for over 40-Gb/s optical transmission systems has been developed. The FDC topology enables both wider bandwidth and digital functions. The distr
Autor:
Hikaru Hida, C. Kurioka, Shinichi Tanaka, Hiroaki Uchida, Z. Yamazaki, Shigeki Wada, Yasuyuki Suzuki, Y. Arnamiya
Publikováno v:
2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519).
A 120Gb/s multiplexer and a 110Gb/s demultiplexer are implemented in an InP HBT process. They feature a direct drive series-gating configuration selector, an asymmetrical latch flip-flop, and broadband impedance matching with inverted micro-strip lin