Zobrazeno 1 - 10
of 33
pro vyhledávání: '"Yves Leduc"'
Publikováno v:
Journal of Low Power Electronics and Applications, Vol 14, Iss 2, p 22 (2024)
In this paper, a low-power Injection-Locked Clock and Data Recovery (ILCDR) using a 28 nm Ultra-Thin Body and Box-Fully Depleted Silicon On Insulator (UTBB-FDSOI) technology is presented. The back-gate auto-biasing of UTBB-FDSOI transistors enables t
Externí odkaz:
https://doaj.org/article/a510b02b0e5e4c3395ef0f9adb75b793
Publikováno v:
Journal of Low Power Electronics and Applications, Vol 14, Iss 1, p 8 (2024)
Although Moore’s Law reaches its limits, it has never applied to analog and RF circuits. For example, due to the short channel effect (SCE), drain-induced barrier lowering (DIBL), and sub-threshold slope (SS)…, longer transistors are required to
Externí odkaz:
https://doaj.org/article/df62a7b675244961ac0ca48c014bc7a5
Autor:
Zhaopeng Wei, Gilles Jacquemod, Yves Leduc, Emeric de Foucauld, Jerome Prouvee, Benjamin Blampey
Publikováno v:
Active and Passive Electronic Components, Vol 2019 (2019)
Analog integrated circuits never follow the Moore’s Law. This is particularly right for passive component. Due to the Short Channel Effect, we have to implement longer transistor, especially for analog cell. In this paper, we propose a new topology
Externí odkaz:
https://doaj.org/article/73bcb8515dc1463dbd1ad7f806d71cfd
Publikováno v:
IEEE Electromagnetic Compatibility Magazine. 11:73-83
In this paper, a low-power Injection-Locked Clock and Data Recovery (ILCDR) using 28 nm FDSOI technology is presented. The back-gate auto-biasing of UTBB-FDSOI transistors allows us to create a QRO (Quadrature Ring Oscillator) reducing both size and
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::be010226d71475a96f8d3c273aae3147
https://doi.org/10.21203/rs.3.rs-2084207/v1
https://doi.org/10.21203/rs.3.rs-2084207/v1
Publikováno v:
International Journal of Digital Information and Wireless Communications. 8:106-109
Publikováno v:
SN Applied Sciences. 1
In this paper, we have implemented, using Matlab Simulink an analog artificial neural network for breast cancer classification. Simulated results with ideal building blocks exhibit a total error of classification of 2.6%. Thanks to this value, we hav
Publikováno v:
VLSI-SoC
Analog integrated circuits, in particular passive components, never follow the Moore’s law. FDSOI (Fully Depleted Silicon On Insulator) technology allows to reduce the SCE (Short Channel Effect) and to design new mixed-signal topologies in order to
Publikováno v:
PRIME
This paper presents a methodology to create a Simultaneous Switching Noise (SSN) predictive SPICE model for a 32-bit microcontroller. Here, the purpose is to predict the noise interference generated by switching IOs and establish new design/layout ru
Autor:
Philippe Lorenzini, Gilles Jacquemod, Frederic Hameau, Emeric de Foucauld, Zhaopeng Wei, Yves Leduc
Publikováno v:
Journal of Low Power Electronics. 12:64-73