Zobrazeno 1 - 10
of 40
pro vyhledávání: '"Yun-Young Yeoh"'
Publikováno v:
Phys. Chem. Chem. Phys.. 14:1642-1648
Defect structures of BaTiO(3) and the like co-doped with variable-valence acceptors and donors are not clear particularly in transition from acceptor domination to donor domination with increasing oxygen activity. We have, thus, examined the electric
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::89163e744bebabc270845877be2546ca
https://doi.org/10.1039/c2cp22711h
https://doi.org/10.1039/c2cp22711h
Autor:
Kyoung Hwan Yeo, Yoon-Ha Jeong, Hyun-Sik Choi, Yun Young Yeoh, Dong-Won Kim, Kinam Kim, Rock-Hyun Baek, Chang-Ki Baek, Jeong-Soo Lee, D.M. Kim
Publikováno v:
IEEE Transactions on Nanotechnology. 10:417-423
In this paper, the volume trap densities Nt are extracted from gate-all-around silicone-nanowire FETs with different gate oxides, using a cylindrical-coordinate-based flicker noise model developed. For extracting Nt, the drain-current power spectral
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cbfe0bccd6c0de406d118e31f7b733f8
https://doi.org/10.1109/tnano.2010.2044188
https://doi.org/10.1109/tnano.2010.2044188
Autor:
Yoon-Ha Jeong, D.M. Kim, Yun Young Yeoh, Sung-Woo Jung, Dong-Won Kim, Rock-Hyun Baek, Chang-Ki Baek, Jeong-Soo Lee
Publikováno v:
IEEE Transactions on Nanotechnology. 9:212-217
The series resistance, R sd in silicon nanowire FETs (Si-NWFET) is extracted unambiguously, using the Y -function technique, in conjunction with the drain current and transconductance data. The volume channel inversion in Si-NWFET renders the charge
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5fbf9841ce6893d2fb7a099924f7b508
https://doi.org/10.1109/tnano.2009.2028024
https://doi.org/10.1109/tnano.2009.2028024
Autor:
Keun Hwi Cho, Eun Jung Yoon, Sung Dae Suk, Dong-Won Kim, Sung-min Kim, Sung-young Lee, Ming Li, Sung Hwan Kim, Yun Young Yeoh, Chang Woo Oh, Min Sang Kim, Kyoung Hwan Yeo, Dong-gun Park
Publikováno v:
IEEE Transactions on Nanotechnology. 7:181-184
A gate-all-around (GAA) twin silicon nanowire MOSFET (TSNWFET) with 5-nm-radius channels on a bulk Si wafer is successfully fabricated to achieve extremely high-drive currents of 2.37 mA/ mum for n-channel and 1.30 mA/ mum for p-channel TSNWFETs with
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::966857d2c56a7c85c5d0d50c777777ea
https://doi.org/10.1109/tnano.2008.917843
https://doi.org/10.1109/tnano.2008.917843
Autor:
Yoon-Ha Jeong, Sung Dae Suk, Kyoung Hwan Yeo, Yun Young Yeoh, Jeong-Soo Lee, Dong-Won Kim, Ming Li, Sanghyun Lee, Rock-Hyun Baek, Chang-Ki Baek, D.M. Kim
Publikováno v:
IEEE Electron Device Letters. 32:116-118
Presented in this letter are the C-V data, measured from nanowire capacitors, which have been fabricated by connecting in parallel a large number of identically processed nanowire FETs. The C-V curves were examined over a range from accumulation to i
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::516a5122cfb8b9b99db4e691ed53afaf
https://doi.org/10.1109/led.2010.2092409
https://doi.org/10.1109/led.2010.2092409
Autor:
Donggun Park, Sung Dae Suk, Ming Li, Yun Young Yeoh, Kyoung Hwan Yeo, Sungwoo Hwang, Dong-Won Kim, Keun Hwi Cho, Byung Hak Hong, Young Chai Jung, Won-Seong Lee
Publikováno v:
IEEE Electron Device Letters. 28:1129-1131
The characteristics of cylindrical gate-all-around twin silicon nanowire field-effect transistors with a radius of 5 nm have been measured in temperatures T ranging from 4 to 300 K. The dependence of the off-current suggests that thermal generation i
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ba4dadf6291b6be8491766c0bf9f52ff
https://doi.org/10.1109/led.2007.909868
https://doi.org/10.1109/led.2007.909868
Autor:
Chilhee Chung, Kyoung Hwan Yeo, Ming Li, Dong-Won Kim, Sung Dae Suk, Yun Young Yeoh, Dong Kyun Sohn
Publikováno v:
2010 IEEE International Conference on Integrated Circuit Design and Technology.
We have proposed gate-all-around Silicon nanowire MOSFET (SNWFET) on bulk Si as an ultimate transistor. Well controlled processes are used to achieve gate length (L G ) of sub-10nm and narrow nanowire widths. Excellent performance with reasonable V T
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::748a60139a3e7060df612f3781b9e9c4
https://doi.org/10.1109/icicdt.2010.5510288
https://doi.org/10.1109/icicdt.2010.5510288
Autor:
Seung-Hyun Song, Yun Young Yeoh, Hyun-Sik Choi, Yoon-Ha Jeong, Kyoung Hwan Yeo, Jeong-Soo Lee, Dae Mann Kim, Kinam Kim, Sanghyun Lee, Rock-Hyun Baek, Chang-Ki Baek, Dong-Won Kim, Gil-Bok Choi, Hyun Chul Sagong, Chan-Hoon Park
Publikováno v:
2010 IEEE International Reliability Physics Symposium.
In this paper, we introduce the cylindrical coordinate based flicker noise model for Silicon NanoWire Field Effect Transistor (Si-NWFET) with Gate-All-Around (GAA) structure. For the accurate extraction of the volume trap density, N t , with 1/f nois
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::95655cd57e6ee7625a9160f5ad47ec44
https://doi.org/10.1109/irps.2010.5488846
https://doi.org/10.1109/irps.2010.5488846
Investigation on hot carrier reliability of Gate-All-Around Twin Si Nanowire Field Effect Transistor
Autor:
Dong-Won Kim, Kyoung Hwan Yeo, Gyo-Young Jin, Sung Dae Suk, Kyoung-Suk Oh, Ming Li, Yun Young Yeoh
Publikováno v:
2009 IEEE International Reliability Physics Symposium.
Hot carrier (HC) reliability of Gate-All-Around Twin Si Nanowire Field Effect Transistor (GAA TSNWFET) is reported and discussed with respect to size and shape of nanowire channel, gate length, thickness and kind of gate dielectric in detail. Smaller
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ec40c3c093e219f5a92cae012bd0c12a
https://doi.org/10.1109/irps.2009.5173286
https://doi.org/10.1109/irps.2009.5173286
Autor:
Won-Seong Lee, Kyoung Hwan Yeo, Keun Hwi Cho, Yun Young Yeoh, Kyungseok Oh, Sung Dae Suk, Ming Li, Dong-Won Kim
Publikováno v:
2008 IEEE International SOI Conference.
In this work, fabrication of TSNWFET on SOI with down to 25-nm TiN surrounding gate and 8-nm silicon nanowires is reported with high manufacturability and improved device reliability including reduced junction and gate leakage currents by fully elimi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::947f2219891878dca6a0263421dc6efa
https://doi.org/10.1109/soi.2008.4656322
https://doi.org/10.1109/soi.2008.4656322