Zobrazeno 1 - 9
of 9
pro vyhledávání: '"Yukimasa Miyamoto"'
Autor:
Hiroshi Tsurumi, Akira Yamaga, Daisuke Takeda, Takashi Wakutsu, Manabu Mukai, Tomoya Tandai, Takeshi Tomizawa, Yukimasa Miyamoto
Publikováno v:
Electronics and Communications in Japan (Part I: Communications). 89:1-14
In this paper, we study the modem architecture for software-defined radio. We proposed a hierarchical modem architecture and a tree bus structure based on the time constraint and complexity in the signal processing in software-defined radio. We divid
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::95ff35291f72a53681a1fd625c0e08a9
https://doi.org/10.1002/ecja.20259
https://doi.org/10.1002/ecja.20259
Autor:
Kenichi Maeda, Masataka Matsui, Yasuhiro Taniguchi, Hiroaki Nakai, Takashi Miyamori, Tatsuo Kozakaya, Jun Tanabe, Yukimasa Miyamoto, Kenji Furukawa
Publikováno v:
Journal of Robotics and Mechatronics. 17:437-446
We developed an image recognition processor, “Visconti,” based on a configurable processor. Three VLIW processors that execute three instructions in parallel are integrated into a single chip with peripheral modules such as video I/Os and an SDRA
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::68c2a5130ab1f591ca19addb4b486439
https://doi.org/10.20965/jrm.2005.p0437
https://doi.org/10.20965/jrm.2005.p0437
Autor:
Yutaka Nakamura, Yukihito Oowaki, Toshitada Saito, Yukimasa Miyamoto, Ryoichi Bandai, Atsushi Kondo, M. Takahashi, Naoto Oshiyama, Takuma Aoyama, Ryota Terauchi, Kenta Yasufuku
Publikováno v:
A-SSCC
This paper presents a UHS-II SD card controller with 240MB/s write and 260MB/s read throughput. Two opposite direction IO lanes for down- and up-streams are quickly switched as single direction for double data rate, without adding extra IO pins. The
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7230a3d03eb60c01bbaefcf4b6d20c95
https://doi.org/10.1109/asscc.2014.7008852
https://doi.org/10.1109/asscc.2014.7008852
Autor:
T. Fujita, Fumiyuki Yamane, Hiroyuki Usui, Hiroyuki Hara, Fumihiko Tachibana, Takahiro Yamashita, Mototsugu Hamada, Yoshiro Tsuboi, Shuou Nomura, Yukimasa Miyamoto, Chen Kong Teh
Publikováno v:
2009 IEEE International Conference on IC Design and Technology.
A multi-core co-processor for mobile application processors is introduced. It provides low-power, high-throughput, fully software-based acceleration of multimedia processing. The test chip fabricated in a 65nm CMOS technology consumes 620mW in H.264
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::45c7b90175cb035aa29e536e8b4dcbdc
https://doi.org/10.1109/icicdt.2009.5166280
https://doi.org/10.1109/icicdt.2009.5166280
Autor:
Takashi Miyamori, K. Seki, Masato Uchiyama, S. Matsumoto, Fumiyuki Yamane, Yohji Watanabe, C. Kumtornkittikul, Jun Tanabe, M. Takahashi, Shuou Nomura, Hiroyuki Usui, Takahiro Yamashita, H. Sato, Y. Homma, Takeshi Kitahara, Yoshiro Tsuboi, Fumihiko Tachibana, M. Hamada, Yukimasa Miyamoto, Chen Kong Teh, Hiroyuki Hara, T. Fujita
Publikováno v:
ISSCC
A AAC-decoding, H.264 decoding, media processor with embedded forward-body-biasing and power-gating circuit in CMOS technology is proposed. Since all the components necessary for the scheme are simple MOS circuits requiring no extra supply voltages,
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::aae9232d7ca5af740a1278a72b209f40
https://doi.org/10.1109/isscc.2008.4523157
https://doi.org/10.1109/isscc.2008.4523157
Autor:
T. Shimada, Toshio Fujisawa, K. Matsue, N. Kato, Minoru Namekata, Takashi Ueno, T. Aono, S. Kaburaki, Masahiro Sekiya, Yasuo Unekawa, Takashi Wakutsu, T. Kamimura, Hirotsugu Kajihara, Toshitada Saito, Masaaki Ikuta, Tatsuo Shiozawa, Koji Tsuchie, Kouji Horisaki, Yukimasa Miyamoto, Akira Yamaga, Hideaki Nakakita, K. Shimizu, Masanori Kuwahara, Daisuke Taki, S. Yamazaki
Publikováno v:
2005 IEEE Asian Solid-State Circuits Conference.
This paper presents the first wireless LAN baseband LSI capable of transmitting high-definition audio with video (HD-A/V) content requiring secure content protection. The LSI fully complies with IEEE 802.11a, e, h, and i. The hybrid coordination func
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9ed69b13ba10b19d7286ae1fbd1858ca
https://doi.org/10.1109/asscc.2005.251780
https://doi.org/10.1109/asscc.2005.251780
Autor:
H. Nakayama, Kenichi Maeda, Y. Taniguchi, J. Tanabe, H. Takeda, N. Takeda, Yukimasa Miyamoto, T. Miyamori, M. Matsui, M. Tarui
Publikováno v:
CICC
An 18-GOPS multi-VLIW image recognition processor, "Visconti" (vision based sensing, control, and intelligence), for intelligent vehicle applications is described. Three 3-way VLIW processors are integrated into a single chip with peripheral modules
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9119a5a131b5355a7216fe4bb288dadf
https://doi.org/10.1109/cicc.2003.1249387
https://doi.org/10.1109/cicc.2003.1249387
Autor:
A. Sakai, Takeshi Tomizawa, Akira Yamaga, Tomoya Tandai, N. Hosoyama, Manabu Mukai, Yukimasa Miyamoto, H. Tsurumi, S. Kaburaki, Daisuke Takeda, Takashi Wakutsu
Publikováno v:
2003 IEEE 58th Vehicular Technology Conference. VTC 2003-Fall (IEEE Cat. No.03CH37484).
In this paper we discuss a software oriented modem LSI. At first, the target system is focused on 3GPP DS-FDD mode and signal processing complexity of the developed software simulator is measured. According to the signal processing requirement, modem
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::759ff2bf33be46286b48c3157caf8b65
https://doi.org/10.1109/vetecf.2003.1285950
https://doi.org/10.1109/vetecf.2003.1285950
Autor:
K. Yahagi, T. Furuyama, Yoshihisa Kondo, H. Uetani, Y. Masubuchi, Y. Asao, T. Tamai, H. Takano, Takashi Miyamori, I. Katayama, A. Ooue, S. Inoue, Yukimasa Miyamoto, Kazuyoshi Kohno, Y. Inoue, H. Fujimura, S. Asano, A. Yamaga, T. Kitazawa
Publikováno v:
2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177).
A 4 GOPS 3-way VLIW image-recognition processor for an automobile system is based on a configurable media-processor which enables design-time configuration to optimize for a specific application. It uses a 0.25 /spl mu/m CMOS process with a standard-
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3e366954ac2bf4e1f115abbccb80da81
https://doi.org/10.1109/isscc.2001.912581
https://doi.org/10.1109/isscc.2001.912581