Zobrazeno 1 - 10
of 26
pro vyhledávání: '"Yukihiko Maejima"'
Autor:
Shigeki Takahashi, S. Kobayashi, Tohru Miwa, Hiromitsu Hada, T. Kunio, H. Takeuchi, Hideo Toyoshima, Toru Tatsumi, Kazushi Amanuma, Yukihiko Maejima, Hiroki Koike, J. Yamada, Hidemitsu Mori
Publikováno v:
IEEE Journal of Solid-State Circuits. 37:1073-1079
This paper describes a 128-kb FeRAM macro for smart-card microcontrollers. This macro, which was designed and fabricated using a 0.35-/spl mu/m three-metal CMOS and a Capacitor-on-Metal/Via-stacked-Plug (CMVP) process technology, is ideally suited fo
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b121f3553c8811946d659f49905c94c5
https://doi.org/10.1109/jssc.2002.800930
https://doi.org/10.1109/jssc.2002.800930
Autor:
J. Yamada, S. Kobayashi, Toru Tatsumi, Hiroki Koike, T. Miwa, Kazushi Amanuma, Hiromitsu Hada, Hideo Toyoshima, T. Kunio, Yukihiko Maejima
Publikováno v:
IEEE Journal of Solid-State Circuits. 36:522-527
This paper demonstrates new circuit technologies that enable a 0.25-/spl mu/m ASIC SRAM macro to be nonvolatile with only a 17% cell-area overhead. New capacitor-on-metal/via-stacked-plug process technologies permit a nonvolatile SRAM (NV-SRAM) cell
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2cd8d4142bdf49b77832df416c91f081
https://doi.org/10.1109/4.910492
https://doi.org/10.1109/4.910492
Publikováno v:
Integrated Ferroelectrics. 17:81-88
Scaling limit of the PZT capacitors for high-density and low-voltage Nonvolatile Ferroelectric RAM (NVFRAM) is described using the memory operation scheme for data read-out. The analysis is performed using the measured switching polarization characte
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3d7e000050c9b250c3e20e9bbcef5b8a
https://doi.org/10.1080/10584589708012983
https://doi.org/10.1080/10584589708012983
Autor:
Tsuneo Takeuchi, T. Kunio, Yoichi Miyasaka, T. Otsuki, Takashi Hase, Yukihiko Maejima, K. Amantuma, M. Fukuma, N. Tanabe, Tohru Kimura, M. Takada, S. Kobayashi, Yoshihiro Hayashi, N. Shohata, T. Masuki, S. Saito, Hiroki Koike
Publikováno v:
IEEE Journal of Solid-State Circuits. 31:1625-1634
This paper proposes three circuit technologies for achieving mega-bit-class nonvolatile ferroelectric RAMs (NVFRAMs). The proposed nondriven cell plate line write/read scheme (NDP scheme) accomplishes fast write/read operation equivalent to that of D
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6a57f2a772685bfbd6ef25cd1a9bc856
https://doi.org/10.1109/jssc.1996.542307
https://doi.org/10.1109/jssc.1996.542307
Autor:
Naoki Awaji, Yukihiko Maejima
Publikováno v:
Microelectronic Engineering. 23:193-196
A new exposure method, which provides both high X-ray intensity and dose uniformity in a large exposure field for SR lithography, is discussed. This method uses a scanning mirror method and electron beam wobbling in combination in SR beamlines. Simul
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2e6b6247da1af5b2c6d8a4f2cc4566b3
https://doi.org/10.1016/0167-9317(94)90135-x
https://doi.org/10.1016/0167-9317(94)90135-x
Autor:
Hiromitsu Hada, Hideo Toyoshima, S. Kobayashi, J. Yamada, Yukihiko Maejima, Tohru Miwa, Toru Tatsumi, Hiroki Koike, Takemitsu Kunio, Kazushi Amanuma
Publikováno v:
Topics in Applied Physics ISBN: 9783540407188
Ferroelectric Random Access Memories
Ferroelectric Random Access Memories
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a8837da6615ee91ecf188fb0093f1986
https://doi.org/10.1007/978-3-540-45163-1_15
https://doi.org/10.1007/978-3-540-45163-1_15
Autor:
S. Saito, Tsuneo Takeuchi, T. Kunio, Yoichi Miyasaka, Tohru Kimura, N. Tanabe, Hiroki Koike, S. Kobayashi, Takashi Hase, Yoshihiro Hayashi, Takeo Matsuki, M. Takada, Kazushi Amanuma, N. Shohata, T. Otsuki, Yukihiko Maejima, M. Fukuma
Publikováno v:
1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC.
With increase in the capacity of nonvolatile memories, the range of their use has been widening. A nonvolatile ferroelectric RAM (NVFRAM) based on a 1-transistor and 1-capacitor (1T/1C) memory cell has potential for fast-access time and small-chip si
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::844a1b233fe519dd1b607bbf96189a28
https://doi.org/10.1109/isscc.1996.488720
https://doi.org/10.1109/isscc.1996.488720
Autor:
T. Kunio, Shigeki Takahashi, H. Okizaki, Hiromitsu Hada, Yukihiko Maejima, Toru Tatsumi, Kazushi Amanuma
Publikováno v:
International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217).
A capacitor-on-metal/via-stacked-plug (CMVP) memory cell was developed for 0.25 /spl mu/m CMOS logic embedded FeRAM. Using 445/spl deg/C MOCVD Pb(Zr,Ti)O/sub 3/ process, a ferroelectric capacitor is formed after CMOS logic fabrication. Thus, FeRAM ca
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a07632694cfdf0a63b6dd21a2db35b37
https://doi.org/10.1109/iedm.1998.746375
https://doi.org/10.1109/iedm.1998.746375
Autor:
Tsuneo Takeuchi, Takashi Hase, T. Kunio, Takeo Matsuki, S. Saitoh, Yukihiko Maejima, Kazushi Amanuma, S. Kobayashi, Yoshihiro Hayashi, Y. Miyasaka, T. Nakajima, N. Tanabe
Publikováno v:
1995 Symposium on VLSI Technology. Digest of Technical Papers.
A ferroelectric capacitor over bit-line (F-COB) cell is proposed for high density nonvolatile ferroelectric memories (NVFRAMs). This memory cell with 0.7 /spl mu/m design rule was successfully fabricated using a newly-developed fabrication process, c
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6eb8783f10be421908c61891298ce9ca
https://doi.org/10.1109/vlsit.1995.520888
https://doi.org/10.1109/vlsit.1995.520888
Autor:
J. Yamada, Takashi Hase, N. Tanabe, Aya Seike, H. Sugiyama, Tohru Miwa, H. Takeuchi, Naoki Kasai, Toru Tatsumi, Hiroki Koike, Hiromitsu Hada, Hideo Toyoshima, Yukihiko Maejima, T. Nakura, Hidemitsu Mori, S. Kobayashi
Publikováno v:
2001 6th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.01EX443).
We have developed a logic-embedded 96-Kbit FeRAM macro that has low-voltage operation and high-endurance features for smart card applications. The smart card LSI was fabricated using a 0.35 /spl mu/m-standard CMOS process with 3-level metallization a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::99813268adfd473575f99bb00aeb328f
https://doi.org/10.1109/icsict.2001.981454
https://doi.org/10.1109/icsict.2001.981454