Zobrazeno 1 - 10
of 16
pro vyhledávání: '"Yuji Kihara"'
Autor:
Yasumasa Tsukamoto, Koji Nii, Kazumasa Yanagisawa, Yuichiro Ishii, Hidehiro Fujiwara, Yuji Kihara, Shinji Tanaka
Publikováno v:
IEEE Journal of Solid-State Circuits. 46:2535-2544
Showing that the worst minimum operating voltage (Vmin) of an 8T dual-port (DP) SRAM is determined by the write/read-disturbing condition with a finite clock skew, we propose a circuit technique to detect the worst Vmin in asynchronous clock operatio
Autor:
Tsutomu Yoshihara, Yuji Kihara, Yasushi Nakashima, Leona Okamura, Masayuki Nakamoto, Takashi Izutsu
Publikováno v:
Electronics and Communications in Japan (Part II: Electronics). 90:32-41
16-Mbit low-power SRAM (SuperSRAM) was developed using a new memory cell technology which makes use of DRAM technology and TFT technology, which has a record of actual performance in SRAM. For SRAM, the problems of soft errors and operation at the lo
Autor:
Yuji Kihara, Tadafumi Kishimoto, Izumi Ogawa, Tsutomu Yoshihara, Mikio Takai, Koji Niita, Yutaka Arita, Junich Mitsuhasi
Publikováno v:
Japanese Journal of Applied Physics. 46:3377-3379
The simulation of a thermal-neutron-induced single-event upset (SEU) was performed on a 0.4-µm-design-rule 4 Mbit static random access memory (SRAM) using particle and heavy-ion transport code system (PHITS). The SEU rates obtained by the simulation
Publikováno v:
ISQED
With the scaling of MOSFET dimensions and the lowering of supply voltage, more precise estimation of minimum operating voltage (V min ) of SRAM at 6-sigma level is needed. In this paper, we propose a method based on the importance sampling (IS) Monte
Autor:
Koji Nii, Yuichiro Ishii, Yuji Kihara, Tsuyoshi Kida, Shinji Tanaka, T. Yamaki, Yasumasa Tsukamoto, Koji Tanaka
Publikováno v:
CICC
We discuss dynamic stability for single-port SRAM that manifests itself in the difference between minimum operating voltage (Vmin) for longer and shorter word-line (WL) pulse width (T wl ). The most probable failure points (MPFPs) that determine Vmin
Autor:
Atsushi Miyanishi, Tsukasa Saiki, Yuji Kihara, Yuichiro Ishii, Koji Nii, O. Kuromiya, Hidehiro Fujiwara, H. Chigasaki
Publikováno v:
2010 Symposium on VLSI Circuits.
We propose circuit techniques for an 8T dual-port (DP) SRAM to improve its minimum operating voltage (Vdd min ). Active bitline equalizing technique improves the write margin whenever a write-disturb occurs. This technique is applicable for both sync
Autor:
Yuji Kihara, Yuuichi Hirano, Koji Nii, Yasumasa Tsukamoto, Makoto Yabuuchi, Toshiaki Iwamatsu
Publikováno v:
ISSCC
Voltage and technology scaling and increasing random variation in MOSFET characteristics reduce the operational margin of SRAM functionality, and several design techniques have been suggested to improve margins [1–3]. However, it is still difficult
Publikováno v:
Seikei-Kakou. 4:265-271
Publikováno v:
2006 International Symposium on Communications and Information Technologies.
In this paper, we propose two kinds of implementations of the dual port MRAM, one of which is for the read/write concurrent operation while another is for the additional simultaneous read operation. Compared with dual port SRAM, the dual port MRAM ac
Autor:
Koji, Yoshimura, Shingo, Yamamoto, Akihiro, Kawauchi, Mikio, Ito, Shuichi, Nakagawa, Yasuki, Horii, Yoshihito, Higashi, Yasuhiko, Okamura, Yoshihiro, Yamazoe, Fuminori, Nin, Susumu, Inoue, Yuji, Kihara, Mitsuo, Nonomura, Shuichi, Hida, Hiroshi, Okuno, Akira, Okasho, Kazumi, Kamoi, Mikio, Maekawa, Tomohito, Kitamori, Tadashi, Aoki, Toshiyuki, Kamoto, Masahiro, Nakao, Osamu, Ogawa, Tsuneharu, Miki, Hiroshi, Ohe, Tetsuro, Muratani, Tetsuro, Matsumoto
Publikováno v:
Hinyokika kiyo. Acta urologica Japonica. 52(4)
The data of sexually transmitted urethritis in males have been collected at 24 institutes in Kyoto Prefecture since October, 2002. The data collected from January to December in 2004 are summarized herein. A total of 1,275 patients were diagnosed wit