Zobrazeno 1 - 10
of 11
pro vyhledávání: '"Yuan-Sheng Lee"'
Autor:
Yuan-Sheng Lee, 李元生
104
This study aims to generalize TODIM (an acronym in Portuguese of Interactive and Multi-Criteria Decision Making) by incremental analysis (IA) for a risky decision making and extending it to a group decision-making environment. For generaliza
This study aims to generalize TODIM (an acronym in Portuguese of Interactive and Multi-Criteria Decision Making) by incremental analysis (IA) for a risky decision making and extending it to a group decision-making environment. For generaliza
Externí odkaz:
http://ndltd.ncl.edu.tw/handle/74702566709101719483
Autor:
Yuan-Sheng Lee, 李元生
102
The thesis proposes a kind of proactive traffic migration algorithm to resolve the problems of performance degradation due to traffic and thermal imbalance in 3D Network-on-Chip (NoC). The proposed algorithm can mitigate the performance degr
The thesis proposes a kind of proactive traffic migration algorithm to resolve the problems of performance degradation due to traffic and thermal imbalance in 3D Network-on-Chip (NoC). The proposed algorithm can mitigate the performance degr
Externí odkaz:
http://ndltd.ncl.edu.tw/handle/50487139951987298720
Autor:
Yuan-Sheng Lee, 李元升
90
The objective of paper is to develop an uncertainty modeling and the performance robustness method of DC-DC converters. In converter modeling aspect, the principal is using matrix decomposition and dimension reduction techniques. A systematic
The objective of paper is to develop an uncertainty modeling and the performance robustness method of DC-DC converters. In converter modeling aspect, the principal is using matrix decomposition and dimension reduction techniques. A systematic
Externí odkaz:
http://ndltd.ncl.edu.tw/handle/11778997474995328180
Publikováno v:
2022 IEEE Asian Solid-State Circuits Conference (A-SSCC).
Publikováno v:
IEEE Journal of Solid-State Circuits. 54:2243-2254
This paper presents the design of a single-chip, 25-Gb/s optical receiver comprising of a front-end amplifier, a clock and data recovery (CDR), and a 1:4 demultiplexer. Incorporating with an integrating-type receiver front end, a new baud-rate CDR is
Publikováno v:
Phase-Locked Frequency Generation and Clocking: Architectures and circuits for modern wireless and wireline systems ISBN: 9781785618857
This chapter focuses on the design of energy -efficient CDR circuits for highspeed optical links. In the first part, a BMCDR is introduced [3]. It incorporates a selective gating ring oscillator in a phase -locked loop (PLL). The selective gating osc
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4cbc03cc81a496c7bf961c6436f53343
https://doi.org/10.1049/pbcs064e_ch17
https://doi.org/10.1049/pbcs064e_ch17
Autor:
K. Castro, Albert Folch, Yuan-Sheng Lee, Nirveek Bhattacharjee, Alexandra P. Kuo, Yong Tae Kim
Publikováno v:
Adv Mater Technol
Stereolithography (SL) is emerging as an attractive alternative to soft lithography for fabricating microfluidic devices due to its low cost and high design efficiency. Low molecular weight poly(ethylene glycol)diacrylate (MW = 258) (PEG-DA-258) has
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::8dd034e30b65e766d69547181feefb1b
https://europepmc.org/articles/PMC7266111/
https://europepmc.org/articles/PMC7266111/
Autor:
Yuan-Sheng Lee, Wei-Zen Chen
Publikováno v:
2018 IEEE International Conference on Electron Devices and Solid State Circuits (EDSSC).
This paper describes the design techniques of high speed, energy efficient optical receivers, covering from the front-end amplifier to the post clock and data recovery circuit (CDR). An integration type optical receiver incorporating with a current b
Autor:
Wei-Zen Chen, Yuan-Sheng Lee
Publikováno v:
ISCAS
A single chip optical receiver comprising of a fontend amplifier, a CDR, and a 1:4 demultiplexer is presented. Incorporating with an integrating type receiver front-end, a baud-rate CDR is proposed to achieve both high sensitivity and highly energy-e
Publikováno v:
Lab Chip
Here we demonstrate a 3D-printable microvalve that is transparent, built with a biocompatible resin, and has a simple architecture that can be easily scaled up into large arrays. The open-at-rest valve design is derived from Quake's PDMS valve design