Zobrazeno 1 - 2
of 2
pro vyhledávání: '"Yuan-Dar Chung"'
Autor:
Rung-Bin Lin, Yuan-Dar Chung
Publikováno v:
ISVLSI
In this work we first look into the standard cell library enclosed with ASAP7 PDK to uncover the root causes that limit the use of this cell library for research and development. In view of the root causes, we propose a revised technology LEF file fo
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c7dc4bb11bf3b33e63591c595173faee
https://doi.org/10.1109/isvlsi49217.2020.00080
https://doi.org/10.1109/isvlsi49217.2020.00080
Autor:
Rung-Bin Lin, Cheng-Wei Tai, Shang-Rong Fang, Yu-Xiang Chiang, Jin-Kai Yang, Yuan-Dar Chung, Kai-Chun Peng
Publikováno v:
ISVLSI
This article presents our experience of designing double-row height standard cell libraries and their use for chip designs. Seven cell libraries are designed based on the 15nm process technology stipulated in FreePDK15. A single-row height of 7.5 M2
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::baa33ca79f479a36ded2940c00162d84
https://doi.org/10.1109/isvlsi.2018.00022
https://doi.org/10.1109/isvlsi.2018.00022