Zobrazeno 1 - 6
of 6
pro vyhledávání: '"Youwu Tao"'
Publikováno v:
Frontiers of Information Technology & Electronic Engineering. 16:700-706
A multi-stage dual replica bit-line delay (MDRBD) technique is proposed for reducing access time by suppressing the sense-amplifier enable (SAE) timing variation of low voltage static random-access memory (SRAM) applications. Compared with the tradit
Publikováno v:
Electronics Letters. 51:742-743
An efficient replica bitline (RBL) technique for reducing the variation of sense amplifier enable (SAE) timing is proposed. Both RBLs and four-fold replica cells compared with the conventional RBL technique are utilised to favour the desired operatio
Publikováno v:
IEICE Electronics Express. 13:20150951-20150951
Publikováno v:
IEICE Electronics Express. 12:20150102-20150102
Publikováno v:
IEICE Electronics Express. 12:20158001-20158001
Publikováno v:
Electronics Letters (Wiley-Blackwell); 5/14/2015, Vol. 51 Issue 10, p742-743, 2p, 1 Diagram, 1 Chart, 5 Graphs