Zobrazeno 1 - 10
of 16
pro vyhledávání: '"Young-Kyoung Choi"'
Autor:
Young-Kyoung Choi, Young-Jung Choi, Nak-Kyu Park, Ju-Hwan Shon, Chulwoo Kim, Ki-Han Kim, Byong-Tae Chung, Hyun-woo Lee, Kwan-Weon Kim
Publikováno v:
ISSCC
A 512 Mbit consumer DDR2 SDRAM that uses self-dynamic voltage scaling (SDVS) and adaptive design techniques is introduced in this paper. With the increase in the significance of process variation, higher performance requirements reduce the allowable
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::315f6b1081199863686488c7575b9ac8
https://doi.org/10.1109/jssc.2011.2164710
https://doi.org/10.1109/jssc.2011.2164710
Publikováno v:
Optics Communications. 230:239-243
We calculated the transmittance of a one-dimensional (1D) metallo-dielectric photonic crystal (MDPC) in the optical region including the absorption losses in metal layers. The structure consists of five Ag and four GaN layers stacked alternately. Whe
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::32076c2d05418715799e8bcebd381997
https://doi.org/10.1016/j.optcom.2003.11.028
https://doi.org/10.1016/j.optcom.2003.11.028
Publikováno v:
Physica B: Condensed Matter. 338:132-135
We show, from theoretical calculations including the absorption losses in metal layers, that the transmittance of a one-dimensional metallic photonic crystal can be increased up to 67%. The starting structure considered is composed of five layers of
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::44cf5b0ba1639c267c6fb8b86f9fcf9c
https://doi.org/10.1016/s0921-4526(03)00474-5
https://doi.org/10.1016/s0921-4526(03)00474-5
A 1.6V 1.4Gb/s/pin consumer DRAM with self-dynamic voltage-scaling technique in 44nm CMOS technology
Autor:
Hyun-Woo Lee, Ki-Han Kim, Young-Kyoung Choi, Ju-Hwan Shon, Nak-Kyu Park, Kwan-Weon Kim, Chulwoo Kim, Young-Jung Choi, Byong-Tae Chung
Publikováno v:
2011 IEEE International Solid-State Circuits Conference.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::51b8599581553766a24c6ab362c1712a
https://doi.org/10.1109/isscc.2011.5746416
https://doi.org/10.1109/isscc.2011.5746416
Autor:
Hyung-Wook Moon, Won-Joo Yun, Jae-Suck Kang, Sujeong Sim, Sang-hoon Shin, Seung-Wook Kwack, Hyun-woo Lee, Shin-Deok Kang, Kwan-Weon Kim, Jong-Jin Lee, Hyeng-Ouk Lee, Won Jun Choi, Nak-Kyu Park, Byong-Tae Chung, Young-Kyoung Choi, Hyang-Hwa Choi, Jung-Woo Lee, Young-Jung Choi, Keun-Soo Song, Dong Uk Lee, Ki-Han Kim, Jin-Hong Ahn, Ji Yeon Yang, Young Ju Kim
Publikováno v:
ISSCC
As the speed of DRAM increases and the applications spread, DLLs for DRAM require low-jitter characteristics as well as wide operating range in frequency and voltage domains. Even though digital DLLs have improved jitter control schemes [1,2,4], it i
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d3e2e286b65c62e3836c96bc0c173b61
https://doi.org/10.1109/isscc.2009.4977347
https://doi.org/10.1109/isscc.2009.4977347
Autor:
Sang-hoon Shin, Dongsuk Shin, Shin Deok Kang, Won-Joo Yun, Keun Soo Song, Ye Seok Yang, Dong Uk Lee, Won Jun Choi, Jin-Hong Ahn, Hyang Hwa Choi, Hyeng Ouk Lee, Nak Kyu Park, Sujeong Sim, Seung Wook Kwack, Young Ju Kim, Ji Yeon Yang, Hyung Wook Moon, Hyun-woo Lee, Kwan-Weon Kim, Young Kyoung Choi, Jung-Woo Lee, Young Jung Choi
Publikováno v:
ISSCC
We design a DLL that has a slew-rate controlled duty-cycle-correction (DCC) with a fully digital controlled duty-cycle-error detector and has the update gear circuit to shift update mode for low power consumption. The DLL is composed of a dual loop a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4b6e0d0fb4f9670bb5ee6c1eea2be2c2
https://doi.org/10.1109/isscc.2008.4523167
https://doi.org/10.1109/isscc.2008.4523167
Autor:
Ye Seok Yang, Dong Uk Lee, Jung-Woo Lee, Shin Deok Kang, Young Jung Choi, Hyun-woo Lee, Kwan-Weon Kim, Sang-hoon Shin, Young Kyoung Choi, Nak Kyu Park, Won-Joo Yun, Hyeong Ouk Lee, Seung Wook Kwack
Publikováno v:
ISSCC
In this work, a multi-slew-rate output driver is developed to cope with the supply voltage variation and the different I/O component capacitance (denoted by CIO) condition. For accurate data transfer, it is necessary to reduce the design loss in the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a44c495b7d801bb6c899f6bd914cc964
https://doi.org/10.1109/isscc.2008.4523166
https://doi.org/10.1109/isscc.2008.4523166
Autor:
Dong Uk Lee, Hyong Uk Moon, Young Kyoung Choi, Joong Sik Kih, Young Jung Choi, Shin Deok Kang, Jin Hong Ahn, Ki Chang Kwean, Yong Ju Kim, Seung Wook Kwack, Patrik B. Moran, Hyun-woo Lee, Kwan-Weon Kim
Publikováno v:
ISSCC
A series pipelined CAS latency control with voltage-controlled delay line that extends maximum data rate to 2.5Gb/s/pin at 1.7V, is presented. Other schemes applied in the DLL are dual loop control that increases power noise immunity and LPDCC that a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1ed60f36f9398a8bae09039144d4a072
https://doi.org/10.1109/isscc.2006.1696091
https://doi.org/10.1109/isscc.2006.1696091
Autor:
Young-Kyoung Choi, Won-Joo Yun, Ki-Chang Kwean, Won Jun Choi, Seung-Wook Kwack, Young-Jung Choi, Shin-Deok Kang, Sang-hoon Shin, Joong-Sik Kih, Hyong-Uk Moon, Hyun-woo Lee, Kwan-Weon Kim, Hyang-Hwa Choi, Hyeng-Ouk Lee, Nak-Kyu Park, Jung-Woo Lee, Young Ju Kim, Dong Uk Lee, Jin-Hong Ahn, Ye-Seok Yang
Publikováno v:
2006 IEEE Asian Solid-State Circuits Conference.
A new low power, low cost and high performance register-controlled digital delay locked loop with wide locking range is presented. The DLL has dual loops with single replica block, duty cycle correction enhance controller (DCCEC), smart power down co
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6ce5ff40096b319a115e06fb9c94ea05
https://doi.org/10.1109/asscc.2006.357916
https://doi.org/10.1109/asscc.2006.357916
Autor:
Won-Joo Yun, Hyun Woo Lee, Dongsuk Shin, Shin Deok Kang, Ji Yeon Yang, Hyeng Ouk Lee, Dong Uk Lee, Sujeong Sim, Young Ju Kim, Won Jun Choi, Keun Soo Song, Sang Hoon Shin, Hyang Hwa Choi, Hyung Wook Moon, Seung Wook Kwack, Jung Woo Lee, Young Kyoung Choi, Nak Kyu Park, Kwan Weon Kim, Young Jung Choi
Publikováno v:
2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers; 2008, p282-613, 332p