Zobrazeno 1 - 10
of 75
pro vyhledávání: '"Young Chan Jang"'
Publikováno v:
IEEE Access, Vol 12, Pp 176094-176103 (2024)
A 1-kS/s 12-bit successive approximation register (SAR) analog-to-digital converter (ADC) which performs burst conversion is proposed to reduce the loss of the sampled analog signal due to leakage current in the capacitors of the capacitor-based digi
Externí odkaz:
https://doaj.org/article/90fd88c353e444f18097071bbbd23104
Publikováno v:
Sensors, Vol 21, Iss 15, p 5197 (2021)
A 3.0 Gsymbol/s/lane receiver is proposed herein to acquire near-grounded high-speed signals for the mobile industry processor interface (MIPI) C-PHY version 1.1 specification used for CMOS image sensor interfaces. Adaptive level-dependent equalizati
Externí odkaz:
https://doaj.org/article/fad6a7727ea140319522d3b32dbc6f59
Publikováno v:
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE. 22:205-215
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::84dfbe27debeb0ce42acc647585aa5ce
https://doi.org/10.5573/jsts.2022.22.4.205
https://doi.org/10.5573/jsts.2022.22.4.205
Publikováno v:
2022 19th International SoC Design Conference (ISOCC).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1af6ee003720897628636b905eb7785e
https://doi.org/10.1109/isocc56007.2022.10031430
https://doi.org/10.1109/isocc56007.2022.10031430
Autor:
Young-Chan Jang, Jisu Son
Publikováno v:
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE. 20:518-525
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b34924dc360f7c6ff45476a1f57bebfc
https://doi.org/10.5573/jsts.2020.20.6.518
https://doi.org/10.5573/jsts.2020.20.6.518
Autor:
Young-Chan Jang, Pil-Ho Lee
Publikováno v:
IEEE Transactions on Circuits and Systems II: Express Briefs. 67:2672-2676
A 3.0 GSymbol/s/lane transceiver bridge chip, which fully supports the mobile industry processor interface (MIPI) C-PHY version 1.1 specification, is proposed for field-programmable gate array (FPGA)-based pattern generators and frame grabbers. In tr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::181e38aa402d0fc5e7eadf51a677d89b
https://doi.org/10.1109/tcsii.2019.2962839
https://doi.org/10.1109/tcsii.2019.2962839
Publikováno v:
2021 18th International SoC Design Conference (ISOCC).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b418b236e592da28a3e106533b848f86
https://doi.org/10.1109/isocc53507.2021.9614011
https://doi.org/10.1109/isocc53507.2021.9614011
Publikováno v:
Electronics; Volume 11; Issue 22; Pages: 3654
An 11-bit 10 MS/s successive approximation register (SAR) analog-to-digital converter (ADC) is proposed for low-power and small-area applications. A 10-bit differential capacitor–resistor (C–R) digital-to-analog converter (DAC) is used to minimiz
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::b7d5d49c8db9f4550f16465520d56731
https://doi.org/10.3390/electronics11223654
https://doi.org/10.3390/electronics11223654
Autor:
Young-Chan Jang, Pil-Ho Lee
Publikováno v:
IEEE Transactions on Consumer Electronics. 65:484-492
A 20-Gbps receiver bridge chip featuring auto-skew calibration and continuous-time linear equalization is proposed to support the mobile industry processor interface D-PHY version 2.0 specification with four data lanes and one clock lane. The propose
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3a16684d895bce228ba30951f9de8c7a
https://doi.org/10.1109/tce.2019.2942503
https://doi.org/10.1109/tce.2019.2942503
Publikováno v:
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE. 19:378-387
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0edf541acab244fa029d5c3aa5f8729e
https://doi.org/10.5573/jsts.2019.19.4.378
https://doi.org/10.5573/jsts.2019.19.4.378