Zobrazeno 1 - 10
of 11
pro vyhledávání: '"Youn Sung Park"'
Autor:
David Garrett, Youn Sung Park, Seongjong Kim, Jay Sharma, Wenbin Huang, Majid Shaghaghi, Vinay Parthasarathy, Stephen Gibellini, Stephen Bailey, Mallik Moturi, Pieter Vorenkamp, Kurt Busch, Jeremy Holleman, Behrooz Javid, Alireza Yousefi, Mohsen Judy, Atul Gupta
Publikováno v:
2023 IEEE International Solid- State Circuits Conference (ISSCC).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4b71cf85fac6ac0e0470c5e6b120f855
https://doi.org/10.1109/isscc42615.2023.10067588
https://doi.org/10.1109/isscc42615.2023.10067588
Publikováno v:
IEEE Journal of Solid-State Circuits. 50:464-475
Nonbinary LDPC (NB-LDPC) codes, defined over Galois field, offer better coding gain and a lower error floor than binary LDPC codes. However, the complex decoding and large memory requirement have prevented any practical chip implementations. We prese
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e3fb29046c88709c038ef42cbfb152cf
https://doi.org/10.1109/jssc.2014.2362854
https://doi.org/10.1109/jssc.2014.2362854
Publikováno v:
IEEE Journal of Solid-State Circuits. 49:783-794
The majority of the power consumption of a high-throughput LDPC decoder is spent on memory. Unlike in a general-purpose processor, the memory access in an LDPC decoder is deterministic and the access window is short. We take advantage of the unique m
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::29e2112b578fc7638a0e47e7a414b0a5
https://doi.org/10.1109/jssc.2014.2300417
https://doi.org/10.1109/jssc.2014.2300417
Publikováno v:
VLSIC
A 1.48mm 2 1024-bit belief propagation polar decoder is designed in 65nm CMOS. A unidirectional processing reduces the memory size to 45Kb, and simplifies the processing element. A double-column 1024-parallel architecture enables a 4.68Gb/s throughpu
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ef86c888bfbe4b77e78dae403f2d0693
https://doi.org/10.1109/vlsic.2014.6858413
https://doi.org/10.1109/vlsic.2014.6858413
Publikováno v:
ISSCC
The primary design goal of a communication or storage system is to allow the most reliable transmission or storage of more information at the lowest signal-to-noise ratio (SNR). State-of-the-art channel codes including turbo and binary LDPC have been
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c6027cc03ef3d74c5f59ab3badc7db6b
https://doi.org/10.1109/isscc.2013.6487797
https://doi.org/10.1109/isscc.2013.6487797
Autor:
Nathan E. Roberts, Michael Wieckowski, Z. Renner, Youn Sung Park, V. Vinay, Aswin Srinivasa Rao, Prabal Dutta, David Blaauw, C. Schmidt, Zhiyoong Foo, Aaron D. Schulman, Mohammad Hassan Ghaed, Peter M. Chen, Abishek Madhavan, Thomas Schmid, Inhee Lee, Dongmin Yoon, David Devescery
Publikováno v:
CICC
We present Literacy in Technology (LIT), a low power, low cost audio processor for information dissemination among illiterate people groups in developing regions. The 265 K gate, 8 million transistor, 23 mm2, ARM Cortex M0 processor uses a novel memo
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::83585da8ac49a4c8c7d884b16bcb105c
https://doi.org/10.1109/cicc.2012.6330652
https://doi.org/10.1109/cicc.2012.6330652
Publikováno v:
VLSIC
Memory dominates the power consumption of high-throughput LDPC decoders. A 700 MHz refresh-free embedded DRAM (eDRAM) is designed as a low-power memory to retain data for the required access window. 32 1-kb eDRAM arrays are integrated in a 1.6 mm2, 6
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::84ccdd7c0f998cfd86988e25c294048e
https://doi.org/10.1109/vlsic.2012.6243816
https://doi.org/10.1109/vlsic.2012.6243816
Publikováno v:
ISCAS
Nonbinary LDPC codes have shown superior performance, but decoding nonbinary codes is complex, incurring a long latency and a much degraded throughput. We propose a low-latency variable processing node by a skimming algorithm, together with a low-lat
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::07fbae565f733dfabb5213be41ddff49
https://doi.org/10.1109/iscas.2012.6271844
https://doi.org/10.1109/iscas.2012.6271844
Publikováno v:
FPGA
Multitude of design freedoms of LDPC codes and practical decoders require fast simulations. FPGA emulation is attractive but inaccessible due to its design complexity. We propose a library and script based approach to automate the construction of FPG
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0e5ac701ad7a4b030df2ea17a3677a1c
https://doi.org/10.1145/2145694.2145722
https://doi.org/10.1145/2145694.2145722
Autor:
David Devecsery, Ye-Sheng Kuo, Inhee Lee, V. Vinay, N. Slottow, Thomas Schmid, Z. Renner, Youn Sung Park, N. Clark, David Blaauw, R. Frank, Peter M. Chen, Dongmin Yoon, Mohammad Hassan Ghaed, Michael Wieckowski, C. Schmidt, Zhiyoong Foo, Prabal Dutta
Publikováno v:
ACM DEV
Information and communications technology has the potential for deep social impact in developing regions but today's typical ICT devices -- laptops, mobile phones, and similar devices -- are often still too expensive for many scenarios. In this paper
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0e0f9b104b163f5e408552384c0d5a3c
https://doi.org/10.1145/1926180.1926208
https://doi.org/10.1145/1926180.1926208