Zobrazeno 1 - 5
of 5
pro vyhledávání: '"Yoshihiko NAGAHAMA"'
Publikováno v:
Japanese Journal of JSCE. 79
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::34bc02700e58352417a444d6d01529f3
https://doi.org/10.2208/jscejj.22-15008
https://doi.org/10.2208/jscejj.22-15008
Autor:
S. Kanda, S. Yamaguchi, K. Tanaka, Hitoshi Wakabayashi, R. Yamamoto, Hayato Iwamoto, T. Hirano, J. Wang, Yuki Miyanami, K. Kugimiya, Itaru Oshiyama, Yoshihiko Nagahama, K. Ogawa, Y. Tagawa, Naoki Nagashima, Shinya Yamakawa, Masaki Saito, Masashi Nakata, Satoru Mayuzumi, Yoshiya Hagimoto, Y. Tateshita, Masanori Tsukamoto, Shingo Kadomura, Kaori Tai, K. Nagano, Y. Yamamoto
Publikováno v:
2007 IEEE International Electron Devices Meeting.
Extreme high-performance n- and pFETs are achieved as 1300 and 1000 uA/um at Ioff = 100 nA/um and Vdd = 1.0 V, respectively, by applying newly proposed booster technologies. The combination of top-cut dual-stress liners and damascene gate remarkably
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a206c5da2929f135c3396319b66fa27e
https://doi.org/10.1109/iedm.2007.4418926
https://doi.org/10.1109/iedm.2007.4418926
Autor:
Y. Tateshita, R. Yamamoto, Yoshiya Hagimoto, S. Kanda, Shingo Kadomura, J. Wang, Susumu Hiyama, Naoki Nagashima, M. Saito, S. Terauchi, T. Hirano, Kaori Tai, K. Nagano, M. Yamanaka, Yoshihiko Nagahama, Takashi Ando, Hayato Iwamoto, Y. Tagawa, T. Kato, S. Yamaguchi
Publikováno v:
2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers..
We have developed a dual metal gate CMOS technology with HfSix for nMOS and Ru for pMOS on HfO2 gate dielectric. These gate stacks show high mobility (100% of universal mobility for electron, 80% for hole at high fields) down to Tinv of 1.7 nm and sy
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f5c8be1cc449c6cb74954d8b1cc37c1b
https://doi.org/10.1109/vlsit.2006.1705262
https://doi.org/10.1109/vlsit.2006.1705262
Autor:
S. Yamaguchi, Susumu Hiyama, Yoshihiko Nagahama, J. Wang, Shingo Kadomura, S. Kanda, Naoki Nagashima, Takashi Ando, M. Saito, Y. Tateshita, R. Yamamoto, T. Hirano, S. Terauchi, Kaori Tai, M. Yamanaka, Hayato Iwamoto, Y. Tagawa, T. Kato
Publikováno v:
2006 European Solid-State Device Research Conference.
We have developed a high performance pMOSFET with ALD-TiN/HfO2 gate stacks on (110) substrate using gate last process at low temperature. High work function and low gate leakage current are obtained. An extremely high mobility equivalent to P+ poly-S
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f6c7790b99160d9bb33f6c803af09587
https://doi.org/10.1109/essder.2006.307653
https://doi.org/10.1109/essder.2006.307653
Autor:
S. Kanda, Yoshiya Hagimoto, M. Saito, Yuki Miyanami, Naoki Nagashima, Toyotaka Kataoka, R. Yamamoto, T. Ohchi, Y. Tateshita, K. Nagano, J. Wang, Hayato Iwamoto, Yoshiaki Kikuchi, Masanori Tsukamoto, K. Kugimiya, Kaori Tai, Tadayuki Kimura, Takashi Ando, Hitoshi Wakabayashi, Shigeru Fujita, T. Hirano, Y. Yamamoto, C. Yamane, Y. Tagawa, S. Yamaguchi, Yoshihiko Nagahama, T. Ikuta, R. Matsumoto, Shingo Kadomura
Publikováno v:
2006 International Electron Devices Meeting.
CMOS technologies using metal/high-k damascene gate stacks with uniaxial strained silicon channels were developed. Gate electrodes of HfSix and TiN were applied to nFETs and pFETs, respectively. TiN/HfO2 damascene gate stacks and epitaxial SiGe sourc
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cf7c214748a6db19d357723f8f79ba02
https://doi.org/10.1109/iedm.2006.346959
https://doi.org/10.1109/iedm.2006.346959