Zobrazeno 1 - 10
of 134
pro vyhledávání: '"Yoshiaki Deguchi"'
Autor:
Mari Amino, MD, PhD, Koichiro Yoshioka, MD, PhD, Shigetaka Kanda, MD, Yoshiaki Deguchi, MD, PhD, Mari Nakamura, MD, Yoshinori Kobayashi, MD, PhD, Sadaki Inokuchi, MD, PhD, Teruhisa Tanabe, MD, PhD, Yuji Ikari, MD, PhD
Publikováno v:
Journal of Arrhythmia, Vol 30, Iss 3, Pp 180-185 (2014)
Background: Intravenous amiodarone is considered to be the first-line drug for the treatment of ventricular tachycardia or fibrillation. However, in Japan, nifekalant had been used before the introduction of amiodarone; therefore, most clinical studi
Externí odkaz:
https://doaj.org/article/eb757b60d4e54e6c9f5929b045501552
Autor:
Mari Amino, MD, PhD, Koichiro Yoshioka, MD, PhD, Shigetaka Kanda, MD, Yoshiaki Deguchi, MD, PhD, Mari Nakamura, MD, Yoshinori Kobayashi, MD, PhD, Sadaki Inokuchi, MD, PhD, Teruhisa Tanabe, MD, PhD, Yuji Ikari, MD, PhD
Publikováno v:
Journal of Arrhythmia, Vol 30, Iss 5, p 388 (2014)
Externí odkaz:
https://doaj.org/article/336a63f811804c5bb49536f23065cb5a
Publikováno v:
IEEE Journal of Solid-State Circuits. 54:1800-1811
This paper proposes Value-Aware solid-state drive (SSD) with fast access speed and low power consumption by eliminating error-correcting code (ECC). Value-Aware SSD utilizes the error tolerance of image recognition application using a deep neural net
Publikováno v:
IEEE Journal of Solid-State Circuits. 54:745-754
Adaptive artificial neural network (ANN)-coupled low-density parity-check (LDPC) error-correcting code (ECC) (ANN-LDPC ECC) is proposed to increase acceptable errors for various NAND flash memories. The proposed ANN-LDPC ECC can be the universal solu
Publikováno v:
IEEE Journal of Solid-State Circuits. 53:2917-2926
As a comprehensive solution based on the data access frequency, this paper proposes word-line batch $V_{\mathrm {TH}}$ modulation (WBVM) to improve the reliability of 2-D and 3-D-triple-level-cell (TLC) nand flash memories. Proposed WBVM modulates th
Publikováno v:
Solid-State Electronics. 147:63-77
In this paper, versatile triple-level cell (TLC) NAND flash memory control with four proposed techniques, Read-Hot/Cold Migration, Read Voltage Control (RVC), Edge Word-Line Protection (EWLP), and Worst Page Detection (WPD), is proposed for data cent
Autor:
Hikaru Watanabe, Shun Suzuki, Toshiki Nakamura, Keita Mizushina, Ken Takeuchi, Kyoji Mizoguchi, Yoshiaki Deguchi
Publikováno v:
A-SSCC
This paper proposes Privacy-aware Data-Lifetime Control NAND Flash System (PDLCS), which changes the data-lifetime flexibly for the right to be forgotten. This system realizes both short and long term data-lifetime by In-3D Vertical Cell Processing.
Publikováno v:
Journal of food protection. 56(11)
A total of 74 strains were isolated from the intestines of seven freshwater fish and 10 water samples, and identified to the species level by the conventional method based on morphological, physiological and biochemical properties, and DNA-DNA hybrid
Publikováno v:
ESSDERC
Lateral charge migration and vertical charge detrap degrade the reliability of 3D-Triple-Level Cell (TLC) NAND flash. Lateral charge migration is dominant at the low write/erase (W/E) endurance and vertical charge de-trap is dominant at the high endu
Publikováno v:
2018 IEEE Symposium on VLSI Technology.
Highly reliable Approximate-ReRAM (A-ReRAM) with Pixel-to-Pixel Data Matching (P2P-DM) and Inter-Pixel error-correcting code (IP-ECC) is proposed to recognize the image accurately by deep neural network (DNN). By specializing for the image recognitio